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Message-ID: <b96ef82c-4033-43e0-9c1e-347ffb500751@quicinc.com>
Date: Sun, 14 Apr 2024 20:22:17 +0530
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Subject: Re: [PATCH V5 RESEND 5/5] venus: pm_helpers: Use
 dev_pm_genpd_set_hwmode to switch GDSC mode on V6
To: Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
        Bjorn Andersson
	<andersson@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        "Stephen
 Boyd" <sboyd@kernel.org>,
        Stanimir Varbanov <stanimir.k.varbanov@gmail.com>,
        Vikash Garodia <quic_vgarodia@quicinc.com>,
        Mauro Carvalho Chehab
	<mchehab@kernel.org>,
        Ulf Hansson <ulf.hansson@linaro.org>,
        "Rafael J .
 Wysocki" <rafael@kernel.org>,
        Kevin Hilman <khilman@kernel.org>, Pavel Machek
	<pavel@ucw.cz>,
        Len Brown <len.brown@intel.com>,
        Greg Kroah-Hartman
	<gregkh@linuxfoundation.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        "Andy
 Gross" <agross@kernel.org>,
        Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
        Abel Vesa <abel.vesa@linaro.org>
CC: <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <linux-media@vger.kernel.org>,
        <linux-pm@vger.kernel.org>, Taniya Das <quic_tdas@quicinc.com>,
        "Satya Priya
 Kakitapalli" <quic_skakitap@quicinc.com>,
        Imran Shaik
	<quic_imrashai@quicinc.com>,
        Ajit Pandey <quic_ajipan@quicinc.com>
References: <20240413152013.22307-1-quic_jkona@quicinc.com>
 <20240413152013.22307-6-quic_jkona@quicinc.com>
 <5c78ad52-524b-4ad7-b149-0e7252abc2ee@linaro.org>
Content-Language: en-US
From: Jagadeesh Kona <quic_jkona@quicinc.com>
In-Reply-To: <5c78ad52-524b-4ad7-b149-0e7252abc2ee@linaro.org>
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On 4/14/2024 6:09 PM, Bryan O'Donoghue wrote:
> On 13/04/2024 16:20, Jagadeesh Kona wrote:
>> The Venus driver requires vcodec GDSC to be ON in SW mode for clock
>> operations and move it back to HW mode to gain power benefits. Earlier,
>> as there is no interface to switch the GDSC mode from GenPD framework,
>> the GDSC is moved to HW control mode as part of GDSC enable callback and
>> venus driver is writing to its POWER_CONTROL register to keep the GDSC ON
>> from SW whereever required. But the POWER_CONTROL register addresses
>> are not constant and can vary across the variants.
>>
>> Also as per the HW recommendation, the GDSC mode switching needs to be
>> controlled from respective GDSC register and this is a uniform approach
>> across all the targets. Hence use dev_pm_genpd_set_hwmode() API which
>> controls GDSC mode switching using its respective GDSC register.
>>
>> In venus V6 variants, the vcodec gdsc gets enabled in SW mode by default
>> with new HW_CTRL_TRIGGER flag and there is no need to switch it to SW
>> mode again after enable, hence add check to avoid switching gdsc to SW 
>> mode
>> again after gdsc enable. Similarly add check to avoid switching GDSC 
>> to HW
>> mode before disabling the GDSC, so GDSC gets enabled in SW mode in the 
>> next
>> enable.
>>
>> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
>> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
>> ---
> 
> When I tested this out on sm8250 a few months ago it was broken.
> 
> I don't quite see in your commit logs, how the breakage was addressed.
> 
> Can you provide some details ?
> 

Thanks Bryan for your review!

In earlier series, venus driver is switching the vcodec GDSC to HW 
control mode before disabling the GDSC by invoking 
vcodec_control_v4(..., false) in poweroff_coreid(). Due to this, the 
subsequent GDSC enable from venus driver is failing while polling for 
GDSC power ON status, since GDSC is under HW control mode and HW can 
keep the GDSC in disabled state.

Now a check is added in poweroff_coreid() to avoid switching the GDSC to 
HW control mode before disabling the GDSC for Venus V6 variants that use 
this new API. Hence during the next GDSC enable, GDSC will be in SW mode 
and GDSC will powerup properly.

Thanks,
Jagadeesh

> ---
> bod
>