Received: by 2002:ab2:69cc:0:b0:1f4:be93:e15a with SMTP id n12csp1382494lqp; Mon, 15 Apr 2024 05:08:55 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCWbK/skvH7RTkzyn/+bC/LQvAsu3JfyM2Ol1Ywq5azeWASx6suCNsOIweImU+EuwCLPzRYjtgVhCVPK4hn0Btd9W/DN0PTc5qNyF9xDQw== X-Google-Smtp-Source: AGHT+IH7bSiShbZLwf7gBVeIPVAkoxfryC3uwRCrdTf7T9meh1cv3fXMvwPKRyiewyTN511C2BVV X-Received: by 2002:a17:902:f68c:b0:1e5:10e5:b728 with SMTP id l12-20020a170902f68c00b001e510e5b728mr11226446plg.35.1713182935686; Mon, 15 Apr 2024 05:08:55 -0700 (PDT) Return-Path: Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [139.178.88.99]) by mx.google.com with ESMTPS id c5-20020a170903234500b001e462221649si2062276plh.320.2024.04.15.05.08.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 05:08:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-145031-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=DKZ5uOJk; arc=fail (signature failed); spf=pass (google.com: domain of linux-kernel+bounces-145031-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-145031-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 17CAE28361F for ; Mon, 15 Apr 2024 12:08:55 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1970B6CDCA; Mon, 15 Apr 2024 12:08:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="DKZ5uOJk" Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2045.outbound.protection.outlook.com [40.107.94.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A25576A8DE; Mon, 15 Apr 2024 12:08:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.94.45 ARC-Seal:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713182894; cv=fail; b=qQkFGjy0BvEPmdHcp+jwj16Kpxcgdf8iEvukHrp9Ll8psUD2SEPbKX0Q9YWHQztZSHR5nxMqZix+2jcMhxkVLN3SGoMmFhP9E9FhaoeYAdJxisOR0MqAcWioLbmvH0jLojDCJP7nqgcsIyMeVFdU5elT+I63NvTaOn4Gy+N8/3s= ARC-Message-Signature:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713182894; c=relaxed/simple; bh=+UpA2r/4pAWL5wRNo8wRlQcIySUmrfIftB/TL3KS+tg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=eml4R5rLapzOiGeX4VpKN4O47n7w0n/XahPas1jJGgQgOyZdWtjCl6TbLlXimP/ZZkw4Sb3oTWDuBmOYGKWX+ynCfmOsHp3Y4nVkuroYYzDz705+2dLOzVKX+o/73/kr/nz/JsBrN0NzsLmqK5g63SWYDfc6u/P3L7LPTnLoYL4= ARC-Authentication-Results:i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=DKZ5uOJk; arc=fail smtp.client-ip=40.107.94.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=j0CgpfKMEwsuv4ViA/4jei1uAngZcpGaI1uVqRNV4NRymyul8gUNvhpvZuD0hITG+rFdtpWOO2BsqCASd6h8+OfXvAad4MNCdZlCS3k8mgN7n9H5jKo7Zu5wpsI2nv4siSfrcYSirwBbSmKg9jNQcgjm7auWKoi7uzhZ7heXDfLO/Z3Yw94P1SVWR5Vqnh7urW4OBmDOJGdgumCrVcgt0V8sC5kbU2aWYakxOe5mYHWB95hvSKdDgim79ZghyNSJSAQdYwDSwOA58PhINHUkm6cIPxUhrGg0cg9vjO1jDOIuUR/p1lPKipHjyhr+RIbY/0Dh/SUDfrrNnSyF7MMbBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=mmuLLzSnCDGA2ZnEFUZWU0AUkSBYplvOaHdLXNkIP64=; b=ns8lanz9zHXwryM0FHf222xpQEPUALlGtfA90RbrO5OWehd1ub/Mh8HhCcgpkSg/nh6E4b4rNjDKTV5Vyw5VrSifKn7UDhZ2c9e5KWR/uSyzL43ycRBTMCGGmlGg1wyEULxHbnCGGdwZxn0oOuirFMD+Yl1jfM/9AmRF+U980e0OPUezmFHxOUradn5G/GrJvufWi+Mpr9w1T+AE4dzCCmbLhx2LG4f6wKHpP85Eh2Q1tHC+8cptz5UQz2oSQt5VnCsFANq65iEDat4/WvkoFtb9ZkUXTUGUdYoNAVheyDskuaTUIjnBxp84uvJc1+T6scRJduB4EWDxLcjb3fPG7A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=mmuLLzSnCDGA2ZnEFUZWU0AUkSBYplvOaHdLXNkIP64=; b=DKZ5uOJkp138iJ2nSxjFkt7AhzWGj+GD6k4bY57m2PDr9b7ofcoFPJmOoa9sI96+feDB787EnWsxkQFJ6Wg6IjzcrVHNiT6hYUZgoXh+FJVtP3KjxchGhS3uAg8PVE/LFOhGUyQB+w+u45u4I9YfZPLngEcW/KkFzuSHuEZcOl+foQH9eqz6ZNfCUd9LQXBJIG8lIQqjwZaTVFFZwL2l13GE5owj0+fxQUKxKUXLLaux3slmVjNRu7FkSoYefKOGM2WnVFkCIJlsGEvANtcblTqToypYmEApB1mADTWqhZ/MUNYEqfS8ZyVKwgV3Gb25exJmORIX44Gj/dpMNcxw7Q== Received: from BL1PR13CA0316.namprd13.prod.outlook.com (2603:10b6:208:2c1::21) by IA1PR12MB8264.namprd12.prod.outlook.com (2603:10b6:208:3f5::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7452.50; Mon, 15 Apr 2024 12:08:04 +0000 Received: from BL02EPF0001A0F9.namprd03.prod.outlook.com (2603:10b6:208:2c1:cafe::3b) by BL1PR13CA0316.outlook.office365.com (2603:10b6:208:2c1::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7495.17 via Frontend Transport; Mon, 15 Apr 2024 12:08:04 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BL02EPF0001A0F9.mail.protection.outlook.com (10.167.242.100) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7452.22 via Frontend Transport; Mon, 15 Apr 2024 12:08:04 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Mon, 15 Apr 2024 05:07:48 -0700 Received: from dev-r-vrt-155.mtr.labs.mlnx (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Mon, 15 Apr 2024 05:07:42 -0700 From: Danielle Ratson To: CC: , , , , , , , , , , , , , , , , , , , , Subject: [PATCH net-next v2 02/10] mlxsw: Implement ethtool operation to write to a transceiver module EEPROM Date: Mon, 15 Apr 2024 15:07:09 +0300 Message-ID: <20240415120717.1251864-3-danieller@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240415120717.1251864-1-danieller@nvidia.com> References: <20240415120717.1251864-1-danieller@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0F9:EE_|IA1PR12MB8264:EE_ X-MS-Office365-Filtering-Correlation-Id: 2ff0cc94-769f-4c1f-52de-08dc5d44b475 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: YG0jA4WUWcuqd43rhCG4jVFCwW+Lbfd8eBxjJvmgWeqVul4HsZYaSG3twvxe7W2o04NGrxljGkECIzSTozrI9RtxTMM5WMCZIeLPq0TJM0TOp+muk6THOGqv0aUVgIQH7n/equJbymB1uwsx2pY/YRE+dZ2ryzh3K3CiZbr2lINfIbCjlqOt1bP3c1C4Js8M414Vs8HBW07ySzEKWT7S/ghpDvzPwisIESPZvuMm6qtNAx358bVPljED5FDTkOsfpVFOjljPZsHF5SWXHv3Mj2CurLiM9/vJ8fydjtsGF4mSzvl/x4oUPxMXicRlrGBg9igvrvvRRCGQiVd09us2pb4q0tsoYvGI5HK80KuehCPjucqN2ZiEljP240J+AuTxJMwlm0W3yXHtyyVivIZlLirVfrlfdS7Y500OOFIRIvUxjYc7N0I1LlK9eDAK7phuoV7KfMWqlZJSI0G5mvqQTD8jsAY/H0oB2VIIwnOUbZmpZQ9l6duKxZRDuCfuCZP+JVx7h3hKJ/gAIxNVjLtZwmKsJ4zGBc9B7bt/tzYe/8Cy0oeljGd+ZJLT17YQKEBQ56xzzvzY36fXUBZkX+wdop2TdLKWbwyPovUarZxlpCY1Q38h5C9cFEYqqzWIZJlM/+ZbFiID9kKYSm9Tz2osZoUdKcEs6Xy+PjFoc4XQGfciLDFpRI6IyC14OGJrKPa+ufu0zr4zKOcF9qiPy/KC5E6URO/sU0xYN7BsQN9pynzxwxeAFqXvk+ftfLUMEv/l X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230031)(82310400014)(376005)(1800799015)(7416005)(36860700004);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Apr 2024 12:08:04.4483 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2ff0cc94-769f-4c1f-52de-08dc5d44b475 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0F9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8264 From: Ido Schimmel Implement the ethtool_ops::set_module_eeprom_by_page operation to allow ethtool to write to a transceiver module EEPROM, in a similar fashion to the ethtool_ops::get_module_eeprom_by_page operation. Signed-off-by: Ido Schimmel Reviewed-by: Petr Machata --- .../net/ethernet/mellanox/mlxsw/core_env.c | 57 +++++++++++++++++++ .../net/ethernet/mellanox/mlxsw/core_env.h | 6 ++ drivers/net/ethernet/mellanox/mlxsw/minimal.c | 15 +++++ .../mellanox/mlxsw/spectrum_ethtool.c | 15 +++++ 4 files changed, 93 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c index 5d02b6aef4d2..69ba9017ff62 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c +++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c @@ -513,6 +513,63 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, } EXPORT_SYMBOL(mlxsw_env_get_module_eeprom_by_page); +int +mlxsw_env_set_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, + u8 slot_index, u8 module, + const struct ethtool_module_eeprom *page, + struct netlink_ext_ack *extack) +{ + struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core); + u32 bytes_written = 0; + u16 device_addr; + int err; + + if (!mlxsw_env_linecard_is_active(mlxsw_env, slot_index)) { + NL_SET_ERR_MSG_MOD(extack, + "Cannot write to EEPROM of a module on an inactive line card"); + return -EIO; + } + + err = mlxsw_env_validate_module_type(mlxsw_core, slot_index, module); + if (err) { + NL_SET_ERR_MSG_MOD(extack, "EEPROM is not equipped on port module type"); + return err; + } + + device_addr = page->offset; + + while (bytes_written < page->length) { + char mcia_pl[MLXSW_REG_MCIA_LEN]; + char eeprom_tmp[128] = {}; + u8 size; + + size = min_t(u8, page->length - bytes_written, + mlxsw_env->max_eeprom_len); + + mlxsw_reg_mcia_pack(mcia_pl, slot_index, module, page->page, + device_addr + bytes_written, size, + page->i2c_address); + mlxsw_reg_mcia_bank_number_set(mcia_pl, page->bank); + memcpy(eeprom_tmp, page->data + bytes_written, size); + mlxsw_reg_mcia_eeprom_memcpy_to(mcia_pl, eeprom_tmp); + + err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcia), mcia_pl); + if (err) { + NL_SET_ERR_MSG_MOD(extack, "Failed to access module's EEPROM"); + return err; + } + + err = mlxsw_env_mcia_status_process(mcia_pl, extack); + if (err) + return err; + + bytes_written += size; + } + + return 0; +} +EXPORT_SYMBOL(mlxsw_env_set_module_eeprom_by_page); + static int mlxsw_env_module_reset(struct mlxsw_core *mlxsw_core, u8 slot_index, u8 module) { diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.h b/drivers/net/ethernet/mellanox/mlxsw/core_env.h index a197e3ae069c..e4ff17869400 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core_env.h +++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.h @@ -28,6 +28,12 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, const struct ethtool_module_eeprom *page, struct netlink_ext_ack *extack); +int +mlxsw_env_set_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, + u8 slot_index, u8 module, + const struct ethtool_module_eeprom *page, + struct netlink_ext_ack *extack); + int mlxsw_env_reset_module(struct net_device *netdev, struct mlxsw_core *mlxsw_core, u8 slot_index, u8 module, u32 *flags); diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c index f0ceb196a6ce..448263423e36 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c +++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c @@ -140,6 +140,20 @@ mlxsw_m_get_module_eeprom_by_page(struct net_device *netdev, page, extack); } +static int +mlxsw_m_set_module_eeprom_by_page(struct net_device *netdev, + const struct ethtool_module_eeprom *page, + struct netlink_ext_ack *extack) +{ + struct mlxsw_m_port *mlxsw_m_port = netdev_priv(netdev); + struct mlxsw_core *core = mlxsw_m_port->mlxsw_m->core; + + return mlxsw_env_set_module_eeprom_by_page(core, + mlxsw_m_port->slot_index, + mlxsw_m_port->module, + page, extack); +} + static int mlxsw_m_reset(struct net_device *netdev, u32 *flags) { struct mlxsw_m_port *mlxsw_m_port = netdev_priv(netdev); @@ -181,6 +195,7 @@ static const struct ethtool_ops mlxsw_m_port_ethtool_ops = { .get_module_info = mlxsw_m_get_module_info, .get_module_eeprom = mlxsw_m_get_module_eeprom, .get_module_eeprom_by_page = mlxsw_m_get_module_eeprom_by_page, + .set_module_eeprom_by_page = mlxsw_m_set_module_eeprom_by_page, .reset = mlxsw_m_reset, .get_module_power_mode = mlxsw_m_get_module_power_mode, .set_module_power_mode = mlxsw_m_set_module_power_mode, diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c index a755b0a901d3..c79da1411d33 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c @@ -1067,6 +1067,20 @@ mlxsw_sp_get_module_eeprom_by_page(struct net_device *dev, module, page, extack); } +static int +mlxsw_sp_set_module_eeprom_by_page(struct net_device *dev, + const struct ethtool_module_eeprom *page, + struct netlink_ext_ack *extack) +{ + struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); + struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; + u8 slot_index = mlxsw_sp_port->mapping.slot_index; + u8 module = mlxsw_sp_port->mapping.module; + + return mlxsw_env_set_module_eeprom_by_page(mlxsw_sp->core, slot_index, + module, page, extack); +} + static int mlxsw_sp_get_ts_info(struct net_device *netdev, struct ethtool_ts_info *info) { @@ -1256,6 +1270,7 @@ const struct ethtool_ops mlxsw_sp_port_ethtool_ops = { .get_module_info = mlxsw_sp_get_module_info, .get_module_eeprom = mlxsw_sp_get_module_eeprom, .get_module_eeprom_by_page = mlxsw_sp_get_module_eeprom_by_page, + .set_module_eeprom_by_page = mlxsw_sp_set_module_eeprom_by_page, .get_ts_info = mlxsw_sp_get_ts_info, .get_eth_phy_stats = mlxsw_sp_get_eth_phy_stats, .get_eth_mac_stats = mlxsw_sp_get_eth_mac_stats, -- 2.43.0