Received: by 2002:ab2:69cc:0:b0:1f4:be93:e15a with SMTP id n12csp1493905lqp; Mon, 15 Apr 2024 08:04:45 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCXDmv+MbubEaf3/cWIHMq0X+3eSQuV4pgjuGIUiEZAB8oLRtuz9HjJdrPB/SL/aUNEr5tYbvTMt54PLfRcw2RGweasJ8vCQzoDv9rICvA== X-Google-Smtp-Source: AGHT+IGByRl4NiY8TeS6Y5MwcjzPE7gFZ8NUikl3P8FsrCGsugWw/y+vBovoR08eIKf6cw2gJNOn X-Received: by 2002:a05:620a:44ca:b0:78e:d860:5684 with SMTP id y10-20020a05620a44ca00b0078ed8605684mr8630946qkp.9.1713193484883; Mon, 15 Apr 2024 08:04:44 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1713193484; cv=pass; d=google.com; s=arc-20160816; b=S1NLd/gGAJbKMV2pPiTSLRgHmQx5NQSdDr456H1+u8uktwQWhpci+UslzPMsblj849 YAvG2WX0k4nwc8srgsTopfVp0l/U2cpqhbU2CzX7zQjkS/4IXVjkWMfg+5xbTNE2hXtT rzRgpcjJsFmQvBZUh9pUYSrnsvwvJ1DxdXSRFHkc0D/eqjGAqG6FR/Z5LWBBHeq8PNcO GK0oXJpZ3qd2F3778mnua56JjCU/apVnswAklB6Vqz4L9+o3gDr4vBuGXL1qU9c0r/ba ybgPaNUd5SWF4PpLyozWZJ13e1mi+Trw6rKSPsDC9Jib2zIhmFHO/7bK3tEbFx5LsXXQ cDQw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=UilC9OCAXFeG1AIKKADdM+nKqFBTwDI8oJka53wTa84=; fh=BsGDPACDXu1RDz63PBzNFf8SmE6v7ktMCi958UOraf4=; b=U4PT7gaIpG+Sq53/vW3Bo7trChYmTf8Q2V0HvwVYgbi6IQppSNX8HfoE2wwH6/SeXN gUdlDAhZpm52/UGuQo2CaRwtGiZboxyNCARUHNo2IC45p95J5B6v5yCJmB99vg/MeDdk MyZn4a/dc9R+OJcdR9a2cWH4HiBvHyUOIXbZMtBy715A5DIP/zzJIEcJ4kd9k4RcRNF2 67b1USG05GDFYRLZj4Meu5M+7W6ba3cE30m4eb4zVSygv7hBR/8FKhIjhXxwk3dZ51BQ wLPmyO5XZrkwrEGwDhRx4f1tqmwBYFJMa5StSW1tdPxOIu5URn0TqSqC3aR7zX5fw/8E 6mFw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kwiboo.se header.s=fe-e1b5cab7be header.b=R4+bO91M; arc=pass (i=1 spf=pass spfdomain=fe-bounces.kwiboo.se dkim=pass dkdomain=kwiboo.se dmarc=pass fromdomain=kwiboo.se); spf=pass (google.com: domain of linux-kernel+bounces-145416-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-145416-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kwiboo.se Return-Path: Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [2604:1380:45d1:ec00::1]) by mx.google.com with ESMTPS id c28-20020a05620a135c00b0078eb991fe75si10099692qkl.363.2024.04.15.08.04.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 08:04:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-145416-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@kwiboo.se header.s=fe-e1b5cab7be header.b=R4+bO91M; arc=pass (i=1 spf=pass spfdomain=fe-bounces.kwiboo.se dkim=pass dkdomain=kwiboo.se dmarc=pass fromdomain=kwiboo.se); spf=pass (google.com: domain of linux-kernel+bounces-145416-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-145416-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kwiboo.se Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 23D8F1C21F11 for ; Mon, 15 Apr 2024 15:04:44 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1E99378C73; Mon, 15 Apr 2024 15:04:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="R4+bO91M" Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9152D76046 for ; Mon, 15 Apr 2024 15:04:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=149.28.215.223 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713193464; cv=none; b=n/RcgoU7VbsS5bIj7y7kTTVOl19b9xgcDepQEJMCNtL27Q167W10GoFVefG3D2zsJY6GmbbDSrhhsHWorUwk9Od5SRmpzr77/ysEadZR+vXzmwnyy5wbBHq4iVzXqKpwElMDOJRUJjlGclX7YVRuzZDCQf26MS4rokZRfxz8LK8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713193464; c=relaxed/simple; bh=PYMDfBHaHrILD3dJuqjxWb9SKSASX9+XSQCaufF7ZyU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YXmrAneVcTKyv29iYRGsZxNTEnWwWkuLfOO0aI5oqpgjAMznnFTI+PxPJO7F2XsSpWNtTJMjEqEwW6c3SdDqPRzHx31a7hKMiDUR7mKXsMEUKvd/aRvMGh87cQHEeb8Rs556n+hBhpLoAPwqSlRKQQi5RJjpb3/wTSlQNqmxAqU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=R4+bO91M; arc=none smtp.client-ip=149.28.215.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1713193459; bh=UilC9OCAXFeG1AIKKADdM+nKqFBTwDI8oJka53wTa84=; b=R4+bO91MxDIfubvqIV+OKonPMu6kotATJojbwzrf/XDPU4X+8v0H/kmy2Pl/2A6DJxYpQbDWq 51606dALGuIlmkz9pjbbDwH4LNwTVACHNyEFdlcJRTVzFensnA7d/puriOv8ENHH/qWFqadxOxL HHrFkGMZ0aMIOoOHvOe9SyPEYrCV6dShWpizYP28U/ZGItpc4/Dk1DUSc8UCZUhQgVPPcmrqPYm WBWubFdOkhI3s9wRjrR2/He3tgRffwNn3ElnUw5UNGMr3neWfw+cJP3oh9zrcys1FPh2Pt0drdX cS3knE8lixjbWU7fuPtivdU1baAYjPGwmyAUR4EpsakQ== From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH v3 2/2] arm64: dts: rockchip: Add Radxa ZERO 3W/3E Date: Mon, 15 Apr 2024 15:03:44 +0000 Message-ID: <20240415150349.2207075-3-jonas@kwiboo.se> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240415150349.2207075-1-jonas@kwiboo.se> References: <20240415150349.2207075-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-ForwardEmail-ID: 661d41f3fc656ac01cb4647e The Radxa ZERO 3W/3E is an ultra-small, high-performance single board computer based on the Rockchip RK3566, with a compact form factor and rich interfaces. The ZERO 3W and ZERO 3E are basically the same size and model, but differ only in storage and network interfaces. - eMMC (3W) - SD-card (both) - Ethernet (3E) - WiFi/BT (3W) This adds initial support for eMMC, SD-card, Ethernet, HDMI and USB. Signed-off-by: Jonas Karlman --- v2: Add to Makefile v3: Sort hdmi-con and leds nodes alphabetically v3: Sort pmic@20 and regulator@40 nodes by reg v3: Change to regulator-off-in-suspend for vdd_logic Following issue is reported by dtbs_check and is fixed by patch at [1]: hdmi@fe0a0000: Unevaluated properties are not allowed ('#sound-dai-cells' was unexpected) from schema $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml# [1] https://lore.kernel.org/linux-rockchip/3a035c16-75b5-471d-aa9d-e91c2bb9f8d0@gmail.com/ --- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-radxa-zero-3e.dts | 41 ++ .../dts/rockchip/rk3566-radxa-zero-3w.dts | 26 + .../boot/dts/rockchip/rk3566-radxa-zero3.dtsi | 443 ++++++++++++++++++ 4 files changed, 512 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero3.dtsi diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 7da198be8787..ab534e7f993f 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -90,6 +90,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-x55.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-cm3-io.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-zero-3e.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-zero-3w.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-blade.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts new file mode 100644 index 000000000000..0826f7e99a81 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3566-radxa-zero3.dtsi" + +/ { + model = "Radxa ZERO 3E"; + compatible = "radxa,zero-3e", "rockchip,rk3566"; + + aliases { + ethernet0 = &gmac1; + }; +}; + +&gmac1 { + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; + assigned-clock-rates = <0>, <125000000>; + clock_in_out = "output"; + phy-handle = <&rgmii_phy1>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus + &gmac1m1_clkinout>; + status = "okay"; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts new file mode 100644 index 000000000000..be4ddce78378 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3566-radxa-zero3.dtsi" + +/ { + model = "Radxa ZERO 3W"; + compatible = "radxa,zero-3w", "rockchip,rk3566"; + + aliases { + mmc1 = &sdhci; + }; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + mmc-hs200-1_8v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero3.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero3.dtsi new file mode 100644 index 000000000000..ea8ade3a4c99 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero3.dtsi @@ -0,0 +1,443 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include +#include +#include +#include +#include "rk3566.dtsi" + +/ { + aliases { + mmc0 = &sdmmc0; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + hdmi-con { + compatible = "hdmi-connector"; + type = "d"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-green { + color = ; + default-state = "on"; + function = LED_FUNCTION_HEARTBEAT; + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + pinctrl-names = "default"; + pinctrl-0 = <&user_led2>; + }; + }; + + vcc_sys: vcc-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc_1v8: vcc-1v8-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8_p>; + }; + + vcc_3v3: vcc-3v3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + }; + + vcca_1v8: vcca-1v8-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8_p>; + }; + + vcca1v8_image: vcca1v8-image-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcca1v8_image"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8_p>; + }; +}; + +&combphy1 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&gpu { + mali-supply = <&vdd_gpu_npu>; + status = "okay"; +}; + +&hdmi { + avdd-0v9-supply = <&vdda_0v9>; + avdd-1v8-supply = <&vcca1v8_image>; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + #clock-cells = <1>; + clock-output-names = "rk817-clkout1", "rk817-clkout2"; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_gpu_npu: DCDC_REG2 { + regulator-name = "vdd_gpu_npu"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc3v3_sys: DCDC_REG4 { + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca1v8_pmu: LDO_REG1 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v8_p: LDO_REG7 { + regulator-name = "vcc_1v8_p"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-name = "vcc1v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG9 { + regulator-name = "vcc2v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1390000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&pinctrl { + leds { + user_led2: user-led2 { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcca1v8_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_3v3>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + vmmc-supply = <&vcc3v3_sys>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; + +&usb_host0_xhci { + dr_mode = "peripheral"; + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; -- 2.43.2