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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CY8PR11MB7364.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c9efa102-a957-4c44-0214-08dc5dfebcc3 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Apr 2024 10:19:44.9280 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: J5REHUYtmJMdoF0AcWK0gxgwYsQ4EXPHBjnm40YKiiFSUgJbggcUnB6hosUcVeDxlHrHAmsnAIipAwLsBTFnqKJv8pBTZ5e5iy7Twst0xXU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR11MB7315 X-OriginatorOrg: intel.com > -----Original Message----- > From: Thomas Gleixner > Sent: Thursday, April 11, 2024 3:59 AM > To: D, Lakshmi Sowjanya ; > jstultz@google.com; giometti@enneenne.com; corbet@lwn.net; linux- > kernel@vger.kernel.org > Cc: x86@kernel.org; netdev@vger.kernel.org; linux-doc@vger.kernel.org; in= tel- > wired-lan@lists.osuosl.org; andriy.shevchenko@linux.intel.com; Dong, Eddi= e > ; Hall, Christopher S ; > Brandeburg, Jesse ; davem@davemloft.net; > alexandre.torgue@foss.st.com; joabreu@synopsys.com; > mcoquelin.stm32@gmail.com; perex@perex.cz; linux-sound@vger.kernel.org; > Nguyen, Anthony L ; > peter.hilber@opensynergy.com; N, Pandith ; Mohan, > Subramanian ; T R, Thejesh Reddy > ; D, Lakshmi Sowjanya > > Subject: Re: [PATCH v6 09/11] pps: generators: Add PPS Generator TIO Driv= er >=20 > On Wed, Apr 10 2024 at 17:18, lakshmi.sowjanya.d@intel.com wrote: > > +static bool pps_generate_next_pulse(struct pps_tio *tio, ktime_t > > +expires) { > > + u64 art; > > + > > + if (!ktime_real_to_base_clock(expires, CSID_X86_ART, &art)) { > > + pps_tio_disable(tio); > > + return false; > > + } > > + > > + pps_compv_write(tio, art - ART_HW_DELAY_CYCLES); > > + return true; > > +} > > + > > +static enum hrtimer_restart hrtimer_callback(struct hrtimer *timer) { > > + struct pps_tio *tio =3D container_of(timer, struct pps_tio, timer); > > + ktime_t expires, now; > > + u32 event_count; > > + > > + guard(spinlock)(&tio->lock); > > + > > + /* Check if any event is missed. If an event is missed, TIO will be > disabled*/ > > + event_count =3D pps_tio_read(tio, TIOEC); > > + if (!tio->prev_count && tio->prev_count =3D=3D event_count) > > + goto err; > > + tio->prev_count =3D event_count; > > + expires =3D hrtimer_get_expires(timer); > > + now =3D ktime_get_real(); > > + > > + if (now - expires < SAFE_TIME_NS) { > > + if (!pps_generate_next_pulse(tio, expires + SAFE_TIME_NS)) > > + goto err; > > + } >=20 > If the hrtimer callback is invoked late so that now - expires is >=3D SAF= E_TIME_NS > then this just forwards the timer and tries again. Yes we will introduce a return HRTIMER_NORESTART if the time is expired. >=20 > This lacks any form of explanation why this is correct as obviously there= will be a > missing pulse, no? We had added an event count check to detect the missed pulse(i.e if we had = programmed an expired time).=20 Timed I/O hardware has an event count register to log the number of pulses = generated. >=20 > > + hrtimer_forward(timer, now, NSEC_PER_SEC / 2); > > + return HRTIMER_RESTART; > > +err: > > + dev_err(tio->dev, "Event missed, Disabling Timed I/O"); > > + pps_tio_disable(tio); >=20 > Why does this disable it again? The failure path in > pps_generate_next_pulse() does so already, no? will remove disabling twice in the next version of patchset. >=20 > > + return HRTIMER_NORESTART; > > +} > > + >=20 > Thanks, >=20 > tglx