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From: Piyush Malgujar <pmalgujar@marvell.com>
To: "andi.shyti@kernel.org" <andi.shyti@kernel.org>,
        "linux-i2c@vger.kernel.org" <linux-i2c@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
CC: Suneel Garapati <sgarapati@marvell.com>,
        Chandrakala Chavva
	<cchavva@marvell.com>,
        Jayanthi Annadurai <jannadurai@marvell.com>
Subject: RE: [PATCH v6 1/4] i2c: thunderx: Clock divisor logic changes
Thread-Topic: [PATCH v6 1/4] i2c: thunderx: Clock divisor logic changes
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Date: Tue, 16 Apr 2024 13:08:25 +0000
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 definitions=2024-04-16_09,2024-04-16_01,2023-05-22_02

Hi Andi,

We have updated these patches as per the comments, hoping
you could review them.

Thanks,
Piyush

> -----Original Message-----
> From: Piyush Malgujar <pmalgujar@marvell.com>
> Sent: Tuesday, April 2, 2024 7:10 PM
> To: andi.shyti@kernel.org; linux-i2c@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Cc: Suneel Garapati <sgarapati@marvell.com>; Chandrakala Chavva
> <cchavva@marvell.com>; Jayanthi Annadurai <jannadurai@marvell.com>;
> Piyush Malgujar <pmalgujar@marvell.com>
> Subject: [PATCH v6 1/4] i2c: thunderx: Clock divisor logic changes
>=20
> From: Suneel Garapati <sgarapati@marvell.com>
>=20
> Handle changes to clock divisor logic for OcteonTX2 SoC family using
> subsystem ID and using default reference clock source as 100MHz.
>=20
> Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
> Signed-off-by: Piyush Malgujar <pmalgujar@marvell.com>
> Acked-by: Andi Shyti <andi.shyti@kernel.org>
> ---
>  drivers/i2c/busses/i2c-octeon-core.c     | 39 +++++++++++++++++++++---
>  drivers/i2c/busses/i2c-octeon-core.h     | 17 +++++++++++
>  drivers/i2c/busses/i2c-thunderx-pcidrv.c |  7 +++++
>  3 files changed, 59 insertions(+), 4 deletions(-)
>=20
> diff --git a/drivers/i2c/busses/i2c-octeon-core.c b/drivers/i2c/busses/i2=
c-
> octeon-core.c
> index
> 845eda70b8cab52a0453c9f4cb545010fba4305d..75efb375d8e49479267e2147
> 72d4df48352be358 100644
> --- a/drivers/i2c/busses/i2c-octeon-core.c
> +++ b/drivers/i2c/busses/i2c-octeon-core.c
> @@ -17,9 +17,14 @@
>  #include <linux/interrupt.h>
>  #include <linux/kernel.h>
>  #include <linux/module.h>
> +#include <linux/pci.h>
>=20
>  #include "i2c-octeon-core.h"
>=20
> +#define INITIAL_DELTA_HZ		1000000
> +#define TWSI_MASTER_CLK_REG_DEF_VAL	0x18
> +#define TWSI_MASTER_CLK_REG_OTX2_VAL	0x3
> +
>  /* interrupt service routine */
>  irqreturn_t octeon_i2c_isr(int irq, void *dev_id)  { @@ -658,31 +663,57 =
@@
> int octeon_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int n=
um)
> void octeon_i2c_set_clock(struct octeon_i2c *i2c)  {
>  	int tclk, thp_base, inc, thp_idx, mdiv_idx, ndiv_idx, foscl, diff;
> -	int thp =3D 0x18, mdiv =3D 2, ndiv =3D 0, delta_hz =3D 1000000;
> +	bool is_plat_otx2;
> +	unsigned int mdiv_min =3D 2;
> +	/*
> +	 * Find divisors to produce target frequency, start with large delta
> +	 * to cover wider range of divisors, note thp =3D TCLK half period.
> +	 */
> +	unsigned int thp =3D TWSI_MASTER_CLK_REG_DEF_VAL, mdiv =3D 2, ndiv =3D
> 0;
> +	unsigned int delta_hz =3D INITIAL_DELTA_HZ;
> +
> +	is_plat_otx2 =3D octeon_i2c_is_otx2(to_pci_dev(i2c->dev));
> +
> +	if (is_plat_otx2) {
> +		thp =3D TWSI_MASTER_CLK_REG_OTX2_VAL;
> +		mdiv_min =3D 0;
> +	}
>=20
>  	for (ndiv_idx =3D 0; ndiv_idx < 8 && delta_hz !=3D 0; ndiv_idx++) {
>  		/*
>  		 * An mdiv value of less than 2 seems to not work well
>  		 * with ds1337 RTCs, so we constrain it to larger values.
>  		 */
> -		for (mdiv_idx =3D 15; mdiv_idx >=3D 2 && delta_hz !=3D 0; mdiv_idx-
> -) {
> +		for (mdiv_idx =3D 15; mdiv_idx >=3D mdiv_min && delta_hz !=3D 0;
> +mdiv_idx--) {
>  			/*
>  			 * For given ndiv and mdiv values check the
>  			 * two closest thp values.
>  			 */
>  			tclk =3D i2c->twsi_freq * (mdiv_idx + 1) * 10;
>  			tclk *=3D (1 << ndiv_idx);
> -			thp_base =3D (i2c->sys_freq / (tclk * 2)) - 1;
> +			if (is_plat_otx2)
> +				thp_base =3D (i2c->sys_freq / tclk) - 2;
> +			else
> +				thp_base =3D (i2c->sys_freq / (tclk * 2)) - 1;
>=20
>  			for (inc =3D 0; inc <=3D 1; inc++) {
>  				thp_idx =3D thp_base + inc;
>  				if (thp_idx < 5 || thp_idx > 0xff)
>  					continue;
>=20
> -				foscl =3D i2c->sys_freq / (2 * (thp_idx + 1));
> +				if (is_plat_otx2)
> +					foscl =3D i2c->sys_freq / (thp_idx + 2);
> +				else
> +					foscl =3D i2c->sys_freq /
> +						(2 * (thp_idx + 1));
>  				foscl =3D foscl / (1 << ndiv_idx);
>  				foscl =3D foscl / (mdiv_idx + 1) / 10;
>  				diff =3D abs(foscl - i2c->twsi_freq);
> +				/*
> +				 * Diff holds difference between calculated
> frequency
> +				 * value vs desired frequency.
> +				 * Delta_hz is updated with last minimum diff.
> +				 */
>  				if (diff < delta_hz) {
>  					delta_hz =3D diff;
>  					thp =3D thp_idx;
> diff --git a/drivers/i2c/busses/i2c-octeon-core.h b/drivers/i2c/busses/i2=
c-
> octeon-core.h
> index
> 9bb9f64fdda0392364638ecbaafe3fab5612baf6..69bd62940f99eb7868770263
> 80cd1d02a4eaadb9 100644
> --- a/drivers/i2c/busses/i2c-octeon-core.h
> +++ b/drivers/i2c/busses/i2c-octeon-core.h
> @@ -1,5 +1,6 @@
>  /* SPDX-License-Identifier: GPL-2.0 */
>  #include <linux/atomic.h>
> +#include <linux/bitfield.h>
>  #include <linux/clk.h>
>  #include <linux/delay.h>
>  #include <linux/device.h>
> @@ -7,6 +8,7 @@
>  #include <linux/i2c-smbus.h>
>  #include <linux/io.h>
>  #include <linux/kernel.h>
> +#include <linux/pci.h>
>=20
>  /* Controller command patterns */
>  #define SW_TWSI_V		BIT_ULL(63)	/* Valid bit */
> @@ -211,6 +213,21 @@ static inline void octeon_i2c_write_int(struct
> octeon_i2c *i2c, u64 data)
>  	octeon_i2c_writeq_flush(data, i2c->twsi_base + TWSI_INT(i2c));  }
>=20
> +#define PCI_SUBSYS_DEVID_9XXX	0xB
> +#define PCI_SUBSYS_MASK		GENMASK(15, 12)
> +/**
> + * octeon_i2c_is_otx2 - check for chip ID
> + * @pdev: PCI dev structure
> + *
> + * Returns true if the device is an OcteonTX2, false otherwise.
> + */
> +static inline bool octeon_i2c_is_otx2(struct pci_dev *pdev) {
> +	u32 chip_id =3D FIELD_GET(PCI_SUBSYS_MASK, pdev-
> >subsystem_device);
> +
> +	return (chip_id =3D=3D PCI_SUBSYS_DEVID_9XXX); }
> +
>  /* Prototypes */
>  irqreturn_t octeon_i2c_isr(int irq, void *dev_id);  int octeon_i2c_xfer(=
struct
> i2c_adapter *adap, struct i2c_msg *msgs, int num); diff --git
> a/drivers/i2c/busses/i2c-thunderx-pcidrv.c b/drivers/i2c/busses/i2c-thund=
erx-
> pcidrv.c
> index
> a77cd86fe75ed7401bc041b27c651b9fedf67285..75569774003857dc984e8540
> ef8f4d1bb084cfb0 100644
> --- a/drivers/i2c/busses/i2c-thunderx-pcidrv.c
> +++ b/drivers/i2c/busses/i2c-thunderx-pcidrv.c
> @@ -28,6 +28,7 @@
>  #define PCI_DEVICE_ID_THUNDER_TWSI	0xa012
>=20
>  #define SYS_FREQ_DEFAULT		700000000
> +#define OTX2_REF_FREQ_DEFAULT		100000000
>=20
>  #define TWSI_INT_ENA_W1C		0x1028
>  #define TWSI_INT_ENA_W1S		0x1030
> @@ -205,6 +206,12 @@ static int thunder_i2c_probe_pci(struct pci_dev
> *pdev,
>  	if (ret)
>  		goto error;
>=20
> +	/*
> +	 * For OcteonTX2 chips, set reference frequency to 100MHz
> +	 * as refclk_src in TWSI_MODE register defaults to 100MHz.
> +	 */
> +	if (octeon_i2c_is_otx2(pdev))
> +		i2c->sys_freq =3D OTX2_REF_FREQ_DEFAULT;
>  	octeon_i2c_set_clock(i2c);
>=20
>  	i2c->adap =3D thunderx_i2c_ops;
> --
> 2.43.0