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Tue, 16 Apr 2024 21:25:21 -0700 (PDT) Date: Tue, 16 Apr 2024 21:25:18 -0700 From: Charlie Jenkins To: Conor Dooley Cc: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Guo Ren , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Evan Green , =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= , Jonathan Corbet , Shuah Khan , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: Re: [PATCH 02/19] riscv: cpufeature: Fix thead vector hwcap removal Message-ID: References: <20240411-dev-charlie-support_thead_vector_6_9-v1-2-4af9815ec746@rivosinc.com> <20240412-tuesday-resident-d9d07e75463c@wendy> <20240412-eastcoast-disparity-9c9e7d178df5@spud> <20240412-chemist-haunt-0a30a8f280ca@spud> <20240413-sharper-unlivable-5a65660b19e2@spud> <20240416-husband-flavored-96c1dad58b6e@wendy> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240416-husband-flavored-96c1dad58b6e@wendy> On Tue, Apr 16, 2024 at 08:36:33AM +0100, Conor Dooley wrote: > On Mon, Apr 15, 2024 at 08:34:05PM -0700, Charlie Jenkins wrote: > > On Sat, Apr 13, 2024 at 12:40:26AM +0100, Conor Dooley wrote: > > > On Fri, Apr 12, 2024 at 02:31:42PM -0700, Charlie Jenkins wrote: > > > > On Fri, Apr 12, 2024 at 10:27:47PM +0100, Conor Dooley wrote: > > > > > On Fri, Apr 12, 2024 at 01:48:46PM -0700, Charlie Jenkins wrote: > > > > > > On Fri, Apr 12, 2024 at 07:47:48PM +0100, Conor Dooley wrote: > > > > > > > On Fri, Apr 12, 2024 at 10:12:20AM -0700, Charlie Jenkins wrote: > > > > > > > > > > > This is already falling back on the boot CPU, but that is not a solution > > > > > > > > that scales. Even though all systems currently have homogenous > > > > > > > > marchid/mvendorid I am hesitant to assert that all systems are > > > > > > > > homogenous without providing an option to override this. > > > > > > > > > > > > > > There are already is an option. Use the non-deprecated property in your > > > > > > > new system for describing what extesions you support. We don't need to > > > > > > > add any more properties (for now at least). > > > > > > > > > > > > The issue is that it is not possible to know which vendor extensions are > > > > > > associated with a vendor. That requires a global namespace where each > > > > > > extension can be looked up in a table. I have opted to have a > > > > > > vendor-specific namespace so that vendors don't have to worry about > > > > > > stepping on other vendor's toes (or the other way around). In order to > > > > > > support that, the vendorid of the hart needs to be known prior. > > > > > > > > > > Nah, I think you're mixing up something like hwprobe and having > > > > > namespaces there with needing namespacing on the devicetree probing side > > > > > too. You don't need any vendor namespacing, it's perfectly fine (IMO) > > > > > for a vendor to implement someone else's extension and I think we should > > > > > allow probing any vendors extension on any CPU. > > > > > > > > I am not mixing it up. Sure a vendor can implement somebody else's > > > > extension, they just need to add it to their namespace too. > > > > > > I didn't mean that you were mixing up how your implementation worked, my > > > point was that you're mixing up the hwprobe stuff which may need > > > namespacing for $a{b,p}i_reason and probing from DT which does not. > > > I don't think that the kernel should need to be changed at all if > > > someone shows up and implements another vendor's extension - we already > > > have far too many kernel changes required to display support for > > > extensions and I don't welcome potential for more. > > > > Yes I understand where you are coming from. We do not want it to require > > very many changes to add an extension. With this framework, there are > > the same number of changes to add a vendor extension as there is to add > > a standard extension. > > No, it is actually subtly different. Even if the kernel already supports > the extension, it needs to be patched for each vendor > > > There is the upfront cost of creating the struct > > for the first vendor extension from a vendor, but after that the > > extension only needs to be added to the associated vendor's file (I am > > extracting this out to a vendor file in the next version). This is also > > a very easy task since the fields from a different vendor can be copied > > and adapted. > > > > > Another thing I just thought of was systems where the SoC vendor > > > implements some extension that gets communicated in the ISA string but > > > is not the vendor in mvendorid in their various CPUs. I wouldn't want to > > > see several different entries in structs (or several different hwprobe > > > keys, but that's another story) for this situation because you're only > > > allowing probing what's in the struct matching the vendorid. > > > > Since the isa string is a per-hart field, the vendor associated with the > > hart will be used. > > I don't know if you just didn't really read what I said or didn't > understand it, but this response doesn't address my comment. I read what you said! This question seemed to me as another variant of "what happens when one vendor implements an extension from a different vendor", and since we already discussed that I was trying to figure out what you were actually asking. > Consider SoC vendor S buys CPUs from vendors A & B and asks both of them > to implement Xsjam. The CPUs are have the vendorid of either A or B, > depending on who made it. This scenario should not result in two > different hwprobe keys nor two different in-kernel riscv_has_vendor_ext() > checks to see if the extension is supported. *If* the extension is vendor > namespaced, it should be to the SoC vendor whose extension it is, not > the individual CPU vendors that implemented it. > > Additionally, consider that CPUs from both vendors are in the same SoC > and all CPUs support Xsjam. Linux only supports homogeneous extensions > so we should be able to detect that all CPUs support the extension and > use it in a driver etc, but that's either not going to work (or be > difficult to orchestrate) with different mappings per CPU vendor. I saw > your v2 cover letter, in which you said: > Only patch vendor extension if all harts are associated with the same > vendor. This is the best chance the kernel has for working properly if > there are multiple vendors. > I don't think that level of paranoia is required: if firmware tells us > that an extension is supported, then we can trust that those extensions > have been implemented correctly. If the fear of implementation bugs is > what is driving the namespacing that you've gone for, I don't think that > it is required and we can simplify things, with the per-vendor structs > being the vendor of the extension (so SoC vendor S in my example), not > A and B who are the vendors of the CPU IP. > > Thanks, > Conor. > Thank you for expanding upon this idea further. This solution of indexing the extensions based on the vendor who proposed them does make a lot of sense. There are some key differences here of note. When vendors are able to mix vendor extensions, defining a bitmask that contains all of the vendor extensions gets a bit messier. I see two possible solutions. 1. Vendor keys cannot overlap between vendors. A set bit in the bitmask is associated with exactly one extension. 2. Vendor keys can overlap between vendors. There is a vendor bitmask per vendor. When setting/checking a vendor extension, first index into the vendor extension bitmask with the vendor associated with the extension and then with the key of the vendor extension. A third option would be to use the standard extension framework. This causes the standard extension list to become populated with extensions that most harts will never implement so I am opposed to that. This problem carries over into hwprobe since the schemes proposed by Evan and I both rely on the mvendorid of harts associated with the cpumask. To have this level of support in hwprobe for SoCs with a mix of vendors but the same extensions I again see two options: 1. Vendor keys cannot overlap between vendors. A set bit in the bitmask is associated with exactly one extension. This bitmask would be returned by the vendor extension hwprobe key. 2. Vendor keys can overlap between vendors. There is an hwprobe key per vendor. Automatic resolution of the vendor doesn't work because the vendor-specific feature being requested (extensions in the case) may be of a vendor that is different than the hart's vendor, in otherwords there are two variables necessary: the vendor and a way to ask hwprobe for a list of the vendor extensions. With hwprobe there is only the "key" that can be used to encode these variables simultaneously. We could have something like a HWPROBE_THEAD_EXT_0 key that would return all thead vendor extensions supported by the harts corresponding to the cpumask. I didn't list the option that we shove all of the vendor extensions into the same fields that are used for standard extensions because that will fill up the standard extension probing with all of the vendor extensions that most SoCs will not care about. The second option for hwprobe is nice because there are "only" 64 values supported in the returned bitmask so if there ends up being a lot of vendor extensions that need to be exposed, then we would end up with a lot of unused bits on most systems. For the internal kernel structures it matters less (or doesn't matter at all) since it's not exposed to userspace and it can always change. Having consistency is nice for developers though so it would be my preference to have schemes that reflect each other for the in-kernel structures and hwprobe. Thank you for working this problem out with me. I know there is a lot of text I am pushing here, hopefully we can design something that doesn't need to be re-written in the future. - Charlie