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AJvYcCUw8XycVn3MdxryK6R74+kv2cco8Q30dJ/Pg7gSoK5luBJHLp6PVTTu71XEM567rZ/9hsFfkqEJsFNEgVIMQFGMMrksQ2KsNzR9ehcD X-Gm-Message-State: AOJu0Yzk+SRY72ppZlsLB/nuVZ27x7eh5x2OtHsgyj1O4FrP5j5QTHkw 4Ojb/SSlOdXqNsMQYbFawWTfNQzsNvYai8CxZOaXkgtt4tQbEQE+8qrgYy3jZaLzMPG97yZoeYC hWfw/7KuK9mRp3gYoKzPOQCj/j9UFSzBBD3Wa X-Received: by 2002:a2e:b753:0:b0:2d8:d972:67e0 with SMTP id k19-20020a2eb753000000b002d8d97267e0mr8914346ljo.10.1713328099230; Tue, 16 Apr 2024 21:28:19 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240416050616.6056-1-gakula@marvell.com> <20240416050616.6056-4-gakula@marvell.com> In-Reply-To: <20240416050616.6056-4-gakula@marvell.com> From: Kalesh Anakkur Purayil Date: Wed, 17 Apr 2024 09:58:07 +0530 Message-ID: Subject: Re: [net-next PATCH 3/9] octeontx2-pf: Create representor netdev To: Geetha sowjanya Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, kuba@kernel.org, davem@davemloft.net, pabeni@redhat.com, edumazet@google.com, sgoutham@marvell.com, sbhatta@marvell.com, hkelam@marvell.com Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="000000000000c2930506164348fa" --000000000000c2930506164348fa Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Apr 16, 2024 at 10:37=E2=80=AFAM Geetha sowjanya wrote: > > Adds initial devlink support to set/get the switchdev mode. > Representor netdevs are created for each rvu devices when > the switch mode is set to 'switchdev'. These netdevs are > be used to control and configure VFs. > > Signed-off-by: Geetha sowjanya > --- > .../marvell/octeontx2/nic/otx2_devlink.c | 48 ++++++ > .../net/ethernet/marvell/octeontx2/nic/rep.c | 159 ++++++++++++++++++ > .../net/ethernet/marvell/octeontx2/nic/rep.h | 2 + > 3 files changed, 209 insertions(+) > > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c b/= drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c > index 4e1130496573..f4f5f5d93c7e 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c > @@ -76,7 +76,53 @@ static const struct devlink_param otx2_dl_params[] =3D= { > otx2_dl_mcam_count_validate), > }; > > +#ifdef CONFIG_RVU_ESWITCH > +static int otx2_devlink_eswitch_mode_get(struct devlink *devlink, u16 *m= ode) > +{ > + struct otx2_devlink *otx2_dl =3D devlink_priv(devlink); > + struct otx2_nic *pfvf =3D otx2_dl->pfvf; > + > + if (!is_rep_dev(pfvf->pdev)) > + return -EOPNOTSUPP; > + > + *mode =3D pfvf->esw_mode; > + > + return 0; > +} > + > +static int otx2_devlink_eswitch_mode_set(struct devlink *devlink, u16 mo= de, > + struct netlink_ext_ack *extack) > +{ > + struct otx2_devlink *otx2_dl =3D devlink_priv(devlink); > + struct otx2_nic *pfvf =3D otx2_dl->pfvf; > + > + if (!is_rep_dev(pfvf->pdev)) > + return -EOPNOTSUPP; > + > + if (pfvf->esw_mode =3D=3D mode) > + return 0; > + > + pfvf->esw_mode =3D mode; [Kalesh] Move this assignment after the switch block. Else, you will end up updating pfvf->esw_mode to an unsupported mode even though drover returns error. > + switch (mode) { > + case DEVLINK_ESWITCH_MODE_LEGACY: > + rvu_rep_destroy(pfvf); > + break; > + case DEVLINK_ESWITCH_MODE_SWITCHDEV: > + rvu_rep_create(pfvf); > + break; > + default: > + return -EINVAL; > + } > + > + return 0; > +} > +#endif > + > static const struct devlink_ops otx2_devlink_ops =3D { > +#ifdef CONFIG_RVU_ESWITCH > + .eswitch_mode_get =3D otx2_devlink_eswitch_mode_get, > + .eswitch_mode_set =3D otx2_devlink_eswitch_mode_set, > +#endif > }; > > int otx2_register_dl(struct otx2_nic *pfvf) > @@ -112,6 +158,7 @@ int otx2_register_dl(struct otx2_nic *pfvf) > devlink_free(dl); > return err; > } > +EXPORT_SYMBOL(otx2_register_dl); > > void otx2_unregister_dl(struct otx2_nic *pfvf) > { > @@ -123,3 +170,4 @@ void otx2_unregister_dl(struct otx2_nic *pfvf) > ARRAY_SIZE(otx2_dl_params)); > devlink_free(dl); > } > +EXPORT_SYMBOL(otx2_unregister_dl); > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/rep.c b/drivers/n= et/ethernet/marvell/octeontx2/nic/rep.c > index b892a7fe3ddc..fd55ef40c934 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/nic/rep.c > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/rep.c > @@ -28,6 +28,159 @@ MODULE_DESCRIPTION(DRV_STRING); > MODULE_LICENSE("GPL"); > MODULE_DEVICE_TABLE(pci, rvu_rep_id_table); > > +static int rvu_rep_napi_init(struct otx2_nic *priv) > +{ > + struct otx2_cq_poll *cq_poll =3D NULL; > + struct otx2_qset *qset =3D &priv->qset; > + struct otx2_hw *hw =3D &priv->hw; > + int err =3D 0, qidx, vec; > + char *irq_name; > + > + qset->napi =3D kcalloc(hw->cint_cnt, sizeof(*cq_poll), GFP_KERNEL= ); > + if (!qset->napi) > + return -ENOMEM; > + > + /* Register NAPI handler */ > + for (qidx =3D 0; qidx < hw->cint_cnt; qidx++) { > + cq_poll =3D &qset->napi[qidx]; > + cq_poll->cint_idx =3D qidx; > + cq_poll->cq_ids[CQ_RX] =3D > + (qidx < hw->rx_queues) ? qidx : CINT_INVALID_CQ; > + cq_poll->cq_ids[CQ_TX] =3D (qidx < hw->tx_queues) ? > + qidx + hw->rx_queues : CINT_INV= ALID_CQ; > + cq_poll->cq_ids[CQ_XDP] =3D CINT_INVALID_CQ; > + cq_poll->cq_ids[CQ_QOS] =3D CINT_INVALID_CQ; > + > + cq_poll->dev =3D (void *)priv; > + netif_napi_add(priv->reps[qidx]->netdev, &cq_poll->napi, > + otx2_napi_handler); > + napi_enable(&cq_poll->napi); > + } > + /* Register CQ IRQ handlers */ > + vec =3D hw->nix_msixoff + NIX_LF_CINT_VEC_START; > + for (qidx =3D 0; qidx < hw->cint_cnt; qidx++) { > + irq_name =3D &hw->irq_name[vec * NAME_SIZE]; > + > + snprintf(irq_name, NAME_SIZE, "rep%d-rxtx-%d", qidx, qidx= ); > + > + err =3D request_irq(pci_irq_vector(priv->pdev, vec), > + otx2_cq_intr_handler, 0, irq_name, > + &qset->napi[qidx]); > + if (err) { > + dev_err(priv->dev, > + "RVU REP IRQ registration failed for CQ%d= \n", qidx); > + goto err_free_cints; > + } > + vec++; > + > + /* Enable CQ IRQ */ > + otx2_write64(priv, NIX_LF_CINTX_INT(qidx), BIT_ULL(0)); > + otx2_write64(priv, NIX_LF_CINTX_ENA_W1S(qidx), BIT_ULL(0)= ); > + } > + priv->flags &=3D ~OTX2_FLAG_INTF_DOWN; > + return 0; > + > +err_free_cints: > + otx2_free_cints(priv, qidx); > + otx2_disable_napi(priv); > + return err; > +} > + > +static void rvu_rep_free_cq_rsrc(struct otx2_nic *priv) > +{ > + struct otx2_cq_poll *cq_poll =3D NULL; > + struct otx2_qset *qset =3D &priv->qset; > + int qidx, vec; > + > + /* Cleanup CQ NAPI and IRQ */ > + vec =3D priv->hw.nix_msixoff + NIX_LF_CINT_VEC_START; > + for (qidx =3D 0; qidx < priv->hw.cint_cnt; qidx++) { > + /* Disable interrupt */ > + otx2_write64(priv, NIX_LF_CINTX_ENA_W1C(qidx), BIT_ULL(0)= ); > + > + synchronize_irq(pci_irq_vector(priv->pdev, vec)); > + > + cq_poll =3D &qset->napi[qidx]; > + napi_synchronize(&cq_poll->napi); > + vec++; > + } > + otx2_free_cints(priv, priv->hw.cint_cnt); > + otx2_disable_napi(priv); > +} > + > +static void rvu_rep_free_netdev(struct otx2_nic *priv) > +{ > + struct rep_dev *rep; > + int rep_id; > + > + for (rep_id =3D 0; rep_id < priv->rep_cnt; rep_id++) { > + rep =3D priv->reps[rep_id]; > + if (rep && rep->netdev->netdev_ops) { > + unregister_netdev(rep->netdev); > + free_netdev(rep->netdev); > + } > + } > + devm_kfree(priv->dev, priv->reps); > +} > + > +void rvu_rep_destroy(struct otx2_nic *priv) > +{ > + rvu_rep_free_cq_rsrc(priv); > + rvu_rep_free_netdev(priv); > +} > + > +int rvu_rep_create(struct otx2_nic *priv) > +{ > + int rep_cnt =3D priv->rep_cnt; > + struct net_device *ndev; > + struct rep_dev *rep; > + int rep_id, err; > + u16 pcifunc; > + > + priv->reps =3D devm_kcalloc(priv->dev, rep_cnt, sizeof(struct rep= _dev), GFP_KERNEL); > + if (!priv->reps) > + return -ENOMEM; > + > + for (rep_id =3D 0; rep_id < rep_cnt; rep_id++) { > + ndev =3D alloc_etherdev(sizeof(*rep)); > + if (!ndev) { > + dev_err(priv->dev, "PFVF representor:%d creation = failed\n", rep_id); > + err =3D -ENOMEM; > + goto exit; > + } > + > + rep =3D netdev_priv(ndev); > + priv->reps[rep_id] =3D rep; > + rep->mdev =3D priv; > + rep->netdev =3D ndev; > + rep->rep_id =3D rep_id; > + > + ndev->min_mtu =3D OTX2_MIN_MTU; > + ndev->max_mtu =3D priv->hw.max_mtu; > + pcifunc =3D priv->rep_pf_map[rep_id]; > + rep->pcifunc =3D pcifunc; > + > + snprintf(ndev->name, sizeof(ndev->name), "r%dp%dv%d", rep= _id, > + rvu_get_pf(pcifunc), (pcifunc & RVU_PFVF_FUNC_MA= SK)); > + > + eth_hw_addr_random(ndev); > + if (register_netdev(ndev)) { > + dev_err(priv->dev, "PFVF reprentator registration= failed\n"); > + free_netdev(ndev); > + ndev->netdev_ops =3D NULL; [Kalesh] update "rc" with the return status of register_netdev() > + goto exit; > + } > + } > + err =3D rvu_rep_napi_init(priv); > + if (err) > + goto exit; > + > + return 0; > +exit: > + rvu_rep_free_netdev(priv); > + return err; > +} > + > static int rvu_rep_rsrc_free(struct otx2_nic *priv) > { > struct otx2_qset *qset =3D &priv->qset; > @@ -162,6 +315,10 @@ static int rvu_rep_probe(struct pci_dev *pdev, const= struct pci_device_id *id) > if (err) > goto err_detach_rsrc; > > + err =3D otx2_register_dl(priv); > + if (err) > + goto err_detach_rsrc; > + > return 0; > > err_detach_rsrc: > @@ -183,6 +340,8 @@ static void rvu_rep_remove(struct pci_dev *pdev) > { > struct otx2_nic *priv =3D pci_get_drvdata(pdev); > > + otx2_unregister_dl(priv); > + rvu_rep_destroy(priv); > rvu_rep_rsrc_free(priv); > otx2_detach_resources(&priv->mbox); > if (priv->hw.lmt_info) > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/rep.h b/drivers/n= et/ethernet/marvell/octeontx2/nic/rep.h > index 30cce17eb48b..be6c939e5cba 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/nic/rep.h > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/rep.h > @@ -29,4 +29,6 @@ static inline bool is_rep_dev(struct pci_dev *pdev) > return pdev->device =3D=3D PCI_DEVID_RVU_REP; > } > > +int rvu_rep_create(struct otx2_nic *priv); > +void rvu_rep_destroy(struct otx2_nic *priv); > #endif /* REP_H */ > -- > 2.25.1 > > --=20 Regards, Kalesh A P --000000000000c2930506164348fa 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