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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="5aitrf2yQi0+M2T6" Content-Disposition: inline In-Reply-To: <20240417052729.6612-1-five231003@gmail.com> --5aitrf2yQi0+M2T6 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Apr 17, 2024 at 10:57:06AM +0530, Kousik Sanagavarapu wrote: > Convert txt binding of marvell armada 3700 SoC spi controller to dtschema > to allow for validation. >=20 > Signed-off-by: Kousik Sanagavarapu > --- > .../bindings/spi/marvell,armada-3700-spi.yaml | 55 +++++++++++++++++++ > .../bindings/spi/spi-armada-3700.txt | 25 --------- > 2 files changed, 55 insertions(+), 25 deletions(-) > create mode 100644 Documentation/devicetree/bindings/spi/marvell,armada-= 3700-spi.yaml > delete mode 100644 Documentation/devicetree/bindings/spi/spi-armada-3700= =2Etxt >=20 > diff --git a/Documentation/devicetree/bindings/spi/marvell,armada-3700-sp= i.yaml b/Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml > new file mode 100644 > index 000000000000..61caa1d86188 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml > @@ -0,0 +1,55 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/marvell,armada-3700-spi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell Armada 3700 SPI Controller > + > +description: > + The SPI controller on Marvell Armada 3700 SoC. > + > +maintainers: > + - Kousik Sanagavarapu > + > +allOf: > + - $ref: spi-controller.yaml# > + > +properties: > + compatible: > + const: marvell,armada-3700-spi > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + num-cs: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include > + > + spi0: spi@10600 { Iff there's a resubmission, drop the lavel here since it has no users. Reviewed-by: Conor Dooley Cheers, Conor. > + compatible =3D "marvell,armada-3700-spi"; > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + reg =3D <0x10600 0x5d>; > + clocks =3D <&nb_perih_clk 7>; > + interrupts =3D ; > + num-cs =3D <4>; > + }; > +... > diff --git a/Documentation/devicetree/bindings/spi/spi-armada-3700.txt b/= Documentation/devicetree/bindings/spi/spi-armada-3700.txt > deleted file mode 100644 > index 1564aa8c02cd..000000000000 > --- a/Documentation/devicetree/bindings/spi/spi-armada-3700.txt > +++ /dev/null > @@ -1,25 +0,0 @@ > -* Marvell Armada 3700 SPI Controller > - > -Required Properties: > - > -- compatible: should be "marvell,armada-3700-spi" > -- reg: physical base address of the controller and length of memory mapp= ed > - region. > -- interrupts: The interrupt number. The interrupt specifier format depen= ds on > - the interrupt controller and of its driver. > -- clocks: Must contain the clock source, usually from the North Bridge c= locks. > -- num-cs: The number of chip selects that is supported by this SPI Contr= oller > -- #address-cells: should be 1. > -- #size-cells: should be 0. > - > -Example: > - > - spi0: spi@10600 { > - compatible =3D "marvell,armada-3700-spi"; > - #address-cells =3D <1>; > - #size-cells =3D <0>; > - reg =3D <0x10600 0x5d>; > - clocks =3D <&nb_perih_clk 7>; > - interrupts =3D ; > - num-cs =3D <4>; > - }; > --=20 > 2.44.0.548.g91ec36f2cc >=20 --5aitrf2yQi0+M2T6 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZh/nLQAKCRB4tDGHoIJi 0tlyAQDpsyVWmyM4Dt5IeYSWwJGK8qdqH4aGjcGIURgulDbCEAEAjpR4t5busdcv AtxDqeCCr1uTeKmWdl/dMaPaaWfXxg8= =huAB -----END PGP SIGNATURE----- --5aitrf2yQi0+M2T6--