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Message-ID: <9fae0a42-76b8-4029-bd45-0cadd3b93464@collabora.com>
Date: Thu, 18 Apr 2024 11:11:34 +0200
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Subject: Re: [PATCH] arm64: dts: mediatek: mt8395-genio-1200-evk: add u3port1
 for xhci1
To: Macpaul Lin <macpaul.lin@mediatek.com>, Rob Herring <robh+dt@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
 Conor Dooley <conor+dt@kernel.org>, Matthias Brugger
 <matthias.bgg@gmail.com>, devicetree@vger.kernel.org,
 linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
 linux-mediatek@lists.infradead.org
Cc: Bear Wang <bear.wang@mediatek.com>, Pablo Sun <pablo.sun@mediatek.com>,
 Macpaul Lin <macpaul@gmail.com>, Chunfeng Yun <chunfeng.yun@mediatek.com>,
 MediaTek Chromebook Upstream
 <Project_Global_Chrome_Upstream_Group@mediatek.com>,
 Chen-Yu Tsai <wenst@chromium.org>, stable@vger.kernel.org
References: <20240216095751.4937-1-macpaul.lin@mediatek.com>
 <cdcadfdc-1861-b3b3-eafa-22071516197b@mediatek.com>
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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In-Reply-To: <cdcadfdc-1861-b3b3-eafa-22071516197b@mediatek.com>
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Il 18/04/24 05:44, Macpaul Lin ha scritto:
> On 2/16/24 17:57, Macpaul Lin wrote:
>> This patch fixes an issue where xhci1 was not functioning properly because
>> the state and PHY settings were incorrect.
>>
>> The introduction of the 'force-mode' property in the phy-mtk-tphy driver
>> allows for the correct initialization of xhci1 by updating the Device Tree
>> settings accordingly.
>>
>> The necessary fixup which added support for the 'force-mode' switch in the
>> phy-mtk-tphy driver.
>> commit 9b27303003f5 ("phy: mediatek: tphy: add support force phy mode switch")
>> Link: https://lore.kernel.org/r/20231211025624.28991-2-chunfeng.yun@mediatek.com
> 
> Dear AngeloGioacchino,
> 
> Just a soft reminding about the patch has been sent a while back for the shared 
> U3PHY and PCIe PHY setup for genio-1200 boards. I'm not sure if you've missed this 
> patch in mail box. :)
> 
> The patch is pretty important as it lets the device tree (dts) decide whether to 
> enable U3PHY or PCIe PHY. Because this is a shared hardware phy and could only be 
> configured in dts to decide which function to be initialized, so it's something 
> that should be included in the board-specific dts files.
> 
> Do you think it needs to be resubmitted, or is it still in the queue for review? 
> It's meant to be ready for action from kernel version 6.8 onwards.
> 
> Looking forward to your thoughts on this. Let me know if there's anything else you 
> need from my side.
> 

As you can understand, I have to take care of many patches for each merge cycle,
and it may happen that inadvertently some patch goes out of my radar.

Please Macpaul, if this happens again, I appreciate that you remind me about
patches that I seem to leave behind, so please keep sending me such emails if
and when necessary.

Thanks!
Angelo

>> Prior to this fix, the system would exhibit the following probe failure messages
>> for xhci1:
>>    xhci-mtk 11290000.usb: supply vbus not found, using dummy regulator
>>    xhci-mtk 11290000.usb: uwk - reg:0x400, version:104
>>    xhci-mtk 11290000.usb: xHCI Host Controller
>>    xhci-mtk 11290000.usb: new USB bus registered, assigned bus number 5
>>    xhci-mtk 11290000.usb: clocks are not stable (0x1003d0f)
>>    xhci-mtk 11290000.usb: can't setup: -110
>>    xhci-mtk 11290000.usb: USB bus 5 deregistered
>>    xhci-mtk: probe of 11290000.usb failed with error -110
>>
>> With the application of this dts fixup, the aforementioned initialization errors
>> are resolved and xhci1 is working.
>>
>> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
>> ---
>>   arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts 
>> b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts
>> index 7fc515a07c65..e0b9f2615c11 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts
>> +++ b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts
>> @@ -854,6 +854,10 @@
>>   &u3phy1 {
>>       status = "okay";
>> +
>> +    u3port1: usb-phy@700 {
>> +        mediatek,force-mode;
>> +    };
>>   };
>>   &u3phy2 {
>> @@ -885,6 +889,8 @@
>>   };
>>   &xhci1 {
>> +    phys = <&u2port1 PHY_TYPE_USB2>,
>> +           <&u3port1 PHY_TYPE_USB3>;
>>       vusb33-supply = <&mt6359_vusb_ldo_reg>;
>>       status = "okay";
>>   };
> 
> Thanks
> Macpaul Lin