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From: Shravan Ramani <shravankr@nvidia.com>
To: =?iso-8859-1?Q?Ilpo_J=E4rvinen?= <ilpo.jarvinen@linux.intel.com>
CC: Hans de Goede <hdegoede@redhat.com>, Vadim Pasternak <vadimp@nvidia.com>,
	David Thompson <davthompson@nvidia.com>,
	"platform-driver-x86@vger.kernel.org" <platform-driver-x86@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 2/3] platform/mellanox: mlxbf-pmc: Add support for
 64-bit counters and cycle count
Thread-Topic: [PATCH v1 2/3] platform/mellanox: mlxbf-pmc: Add support for
 64-bit counters and cycle count
Thread-Index: AQHakJktkEiBSozD4E+AQxbCdqj0ObFsclCAgAFyTeU=
Date: Thu, 18 Apr 2024 12:06:22 +0000
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References: <cover.1713334019.git.shravankr@nvidia.com>
 <aec3aaa44a5738940b2511726177976336a6c72d.1713334019.git.shravankr@nvidia.com>
 <e77f01b4-f314-6822-8533-95f37a42cd4f@linux.intel.com>
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> On Wed, 17 Apr 2024, Shravan Kumar Ramani wrote:=0A=
> =0A=
> > Add support for programming any counter to monitor the cycle count.=0A=
> > Since counting of cycles using 32-bit ocunters would result in frequent=
=0A=
> > wraparounds, add the ability to combine 2 adjacent 32-bit counters to=
=0A=
> > form 1 64-bit counter.=0A=
> > Both these features are supported by BlueField-3 PMC hardware, hence=0A=
> > the required bit-fields are exposed by the driver via sysfs to allow=0A=
> > the user to configure as needed.=0A=
> >=0A=
> > Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>=0A=
> > Reviewed-by: David Thompson <davthompson@nvidia.com>=0A=
> > Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>=0A=
> > ---=0A=
> =0A=
> > @@ -1799,6 +1902,37 @@ static int mlxbf_pmc_init_perftype_counter(struc=
t device *dev, unsigned int blk_=0A=
> >=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr =3D NULL;=0A=
> >=A0=A0=A0=A0=A0=A0=A0 }=0A=
> >=A0=0A=
> > +=A0=A0=A0=A0 if (pmc->block[blk_num].type =3D=3D MLXBF_PMC_TYPE_CRSPAC=
E) {=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 /*=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 * Couple adjacent odd and even=
 32-bit counters to form 64-bit counters=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 * using "use_odd_counter" sysf=
s which has one bit per even counter.=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 */=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr =3D &pmc->block[blk_num].att=
r_use_odd_counter;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr->dev_attr.attr.mode =3D 0644=
;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr->dev_attr.show =3D mlxbf_pmc=
_use_odd_counter_show;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr->dev_attr.store =3D mlxbf_pm=
c_use_odd_counter_store;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr->nr =3D blk_num;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr->dev_attr.attr.name =3D devm=
_kasprintf(dev, GFP_KERNEL,=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
=A0=A0=A0=A0=A0=A0 "use_odd_counter");=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 if (!attr->dev_attr.attr.name)=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 return -E=
NOMEM;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 pmc->block[blk_num].block_attr[++=
i] =3D &attr->dev_attr.attr;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr =3D NULL;=0A=
> > +=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 /* Program crspace counters to co=
unt clock cycles using "count_clock" sysfs */=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr =3D &pmc->block[blk_num].att=
r_count_clock;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr->dev_attr.attr.mode =3D 0644=
;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr->dev_attr.show =3D mlxbf_pmc=
_count_clock_show;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr->dev_attr.store =3D mlxbf_pm=
c_count_clock_store;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr->nr =3D blk_num;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr->dev_attr.attr.name =3D devm=
_kasprintf(dev, GFP_KERNEL,=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
=A0=A0=A0=A0=A0=A0 "count_clock");=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 if (!attr->dev_attr.attr.name)=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 return -E=
NOMEM;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 pmc->block[blk_num].block_attr[++=
i] =3D &attr->dev_attr.attr;=0A=
> > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 attr =3D NULL;=0A=
> > +=A0=A0=A0=A0 }=0A=
> =0A=
> Hi,=0A=
> =0A=
> What was the reason why this driver could not use .dev_groups to setup=0A=
> sysfs (filtering can be done with .is_visible)?=0A=
> =0A=
=0A=
The current approach was suggested during the initial submission of the dri=
ver and the same has=0A=
been followed since. Do you mean to add a is_visible routine for each of th=
e sysfs types like=0A=
count_clock, use_odd_counter, etc and check the conditions for their inclus=
ion in this routine?=0A=
=0A=
Thanks,=0A=
Shravan=0A=
=0A=