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Date: Thu, 18 Apr 2024 20:37:52 +0300
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Konstantin Pugin <rilian.la.te@ya.ru>
Cc: Konstantin Pugin <ria.freelander@gmail.com>,
	Vladimir Zapolskiy <vz@mleia.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>,
	Hugo Villeneuve <hvilleneuve@dimonoff.com>,
	Lech Perczak <lech.perczak@camlingroup.com>,
	Ilpo =?iso-8859-1?Q?J=E4rvinen?= <ilpo.jarvinen@linux.intel.com>,
	Thomas Gleixner <tglx@linutronix.de>, linux-kernel@vger.kernel.org,
	linux-serial@vger.kernel.org
Subject: Re: [PATCH v3 1/3] serial: sc16is7xx: announce support of
 SER_RS485_RTS_ON_SEND
Message-ID: <ZiFacIT0wzvhzaEk@smile.fi.intel.com>
References: <20240418170610.759838-1-rilian.la.te@ya.ru>
 <20240418170610.759838-2-rilian.la.te@ya.ru>
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Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo

On Thu, Apr 18, 2024 at 08:06:05PM +0300, Konstantin Pugin wrote:
> From: Konstantin Pugin <ria.freelander@gmail.com>
> 
> The hardware supports both RTS_ON_SEND and RTS_AFTER_SEND modes, but
> after the commit 4afeced55baa ("serial: core: fix sanitizing check for
> RTS settings") we always end up with SER_RS485_RTS_AFTER_SEND and

  "...with _RTS_AFTER_SEND set..."

or

  "...with _RTS_AFTER_SEND clear..."

or?..

> always write in the register field SC16IS7XX_EFCR_RTS_INVERT_BIT, which

write to

> breaks some hardware using these chips.

..

I might have been not clear about Vladimir's tag. Please double check
if he gave it against the certain patch or the entire series.

-- 
With Best Regards,
Andy Shevchenko