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([2a0b:e7c0:0:107::aaaa:69]) by smtp.gmail.com with ESMTPSA id n22-20020a170906119600b00a51a9d87570sm1796612eja.17.2024.04.18.23.42.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 18 Apr 2024 23:42:14 -0700 (PDT) Message-ID: <92d2c6cb-77d5-4bf5-9d4a-ab5b03f3f044@kernel.org> Date: Fri, 19 Apr 2024 08:42:13 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/3] serial: sc16is7xx: add support for EXAR XR20M1172 UART To: Konstantin Pugin Cc: Konstantin Pugin , Vladimir Zapolskiy , Greg Kroah-Hartman , Hugo Villeneuve , Andy Shevchenko , Lech Perczak , =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org References: <20240418170610.759838-1-rilian.la.te@ya.ru> <20240418170610.759838-4-rilian.la.te@ya.ru> Content-Language: en-US From: Jiri Slaby Autocrypt: addr=jirislaby@kernel.org; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 18. 04. 24, 19:06, Konstantin Pugin wrote: > From: Konstantin Pugin > > XR20M1172 register set is mostly compatible with SC16IS762, but it has > a support for additional division rates of UART with special DLD register. > So, add handling this register by appropriate devicetree bindings. > > Reviewed-by: Vladimir Zapolskiy > Signed-off-by: Konstantin Pugin > --- > drivers/tty/serial/sc16is7xx.c | 55 +++++++++++++++++++++++++++++++--- > 1 file changed, 51 insertions(+), 4 deletions(-) > > diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c > index a300eebf1401..59376c637467 100644 > --- a/drivers/tty/serial/sc16is7xx.c > +++ b/drivers/tty/serial/sc16is7xx.c .. > @@ -556,16 +579,33 @@ static bool sc16is7xx_regmap_noinc(struct device *dev, unsigned int reg) > > static int sc16is7xx_set_baud(struct uart_port *port, int baud) > { > + struct sc16is7xx_port *s = dev_get_drvdata(port->dev); > struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); > - u8 lcr; > + unsigned long clk = port->uartclk, div, div16; > + bool has_dld = s->devtype->has_dld; > + u8 dld_mode = XR20M117X_DLD_16X; > u8 prescaler = 0; > - unsigned long clk = port->uartclk, div = clk / 16 / baud; > + u8 divisor = 16; > + u8 lcr; > + > + if (has_dld && DIV_ROUND_CLOSEST(clk, baud) < 16) > + divisor = 1 << (fls(DIV_ROUND_CLOSEST(clk, baud)) - 1); Do you mimic roundup_pow_of_two()? -- js suse labs