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Fri, 19 Apr 2024 08:33:24 +0000 Received: from MW4PR12MB6875.namprd12.prod.outlook.com ([fe80::f933:4f7d:1a1e:d7c4]) by MW4PR12MB6875.namprd12.prod.outlook.com ([fe80::f933:4f7d:1a1e:d7c4%7]) with mapi id 15.20.7472.037; Fri, 19 Apr 2024 08:33:23 +0000 From: Shivansh Vij To: Ryan Roberts , Catalin Marinas , Will Deacon , Andrew Morton , Shuah Khan , Joey Gouly , Ard Biesheuvel , Mark Rutland , Anshuman Khandual , David Hildenbrand CC: "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kselftest@vger.kernel.org" Subject: Re: [PATCH v1 0/5] arm64/mm: uffd write-protect and soft-dirty tracking Thread-Topic: [PATCH v1 0/5] arm64/mm: uffd write-protect and soft-dirty tracking Thread-Index: AQHaki1WdjYIu4CfuECqPGqYndfIFbFvNzIAgAAKqq0= Date: Fri, 19 Apr 2024 08:33:22 +0000 Message-ID: References: <20240419074344.2643212-1-ryan.roberts@arm.com> <24999e38-e4f7-4616-8eae-dfdeba327558@arm.com> In-Reply-To: <24999e38-e4f7-4616-8eae-dfdeba327558@arm.com> Accept-Language: en-CA, en-US Content-Language: en-CA X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: x-tmn: [h0XkEBLu0XIa893tZci+kZDvrr4T3Siz] x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MW4PR12MB6875:EE_|BL3PR12MB6619:EE_ x-ms-office365-filtering-correlation-id: c347403f-6cce-43b0-8e72-08dc604b5ffb x-microsoft-antispam: BCL:0; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MW4PR12MB6875.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-CrossTenant-Network-Message-Id: c347403f-6cce-43b0-8e72-08dc604b5ffb X-MS-Exchange-CrossTenant-rms-persistedconsumerorg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Apr 2024 08:33:22.8728 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6619 (Sorry about the previous HTML email, accidentally used the wrong email cli= ent) =0A= =0A= Hey All,=0A= =0A= >On 19/04/2024 08:43, Ryan Roberts wrote:=0A= >> Hi All,=0A= >>=0A= >> This series adds uffd write-protect and soft-dirty tracking support for = arm64. I=0A= >> consider the soft-dirty support (patches 3 and 4) as RFC - see rationale= below.=0A= >>=0A= >> Previous attempts to add these features have failed because of a perceiv= ed lack=0A= >> of available PTE SW bits. However it actually turns out that there are 2= =0A= >> available but they are hidden. PTE_PROT_NONE was previously occupying a = SW bit,=0A= >> but it only applies when PTE_VALID is clear, so this is moved to overlay= PTE_UXN=0A= >> in patch 1, freeing up the SW bit. Bit 63 is marked as "IGNORED" in the = Arm ARM,=0A= >> but it does not currently indicate "reserved for SW use" like it does fo= r the=0A= >> other SW bits. I've confirmed with the spec owner that this is an oversi= ght; the=0A= >> bit is intended to be reserved for SW use and the spec will clarify this= in a=0A= >> future update.=0A= >>=0A= >> So we have our two bits; patch 2 enables uffd-wp, patch 3 enables soft-d= irty and=0A= >> patches 4 and 5 sort out the selftests so that the soft-dirty tests are = compiled=0A= >> for, and run on arm64.=0A= >>=0A= >> That said, these are the last 2 SW bits and we may want to keep 1 bit in= reserve=0A= >> for future use. soft-dirty is only used for CRIU to my knowledge, and it= is=0A= >> thought that their use case could be solved with the more generic uffd-w= p. So=0A= >> unless somebody makes a clear case for the inclusion of soft-dirty suppo= rt, we=0A= >> are probably better off dropping patches 3 and 4 and keeping bit 63 for = future=0A= >> use. Although note that the most recent attempt to add soft-dirty for ar= m64 was=0A= >> last month [1] so I'd like to give Shivansh Vij the opportunity to make = the=0A= >> case.=0A= >=0A= > Ugh, forgot to mention that this applies on top of v6.9-rc3, and all the = uffd-wp=0A= > and soft-dirty tests in the mm selftests suite run and pass. And no regre= ssions=0A= > are observed in any of the other selftests.=0A= =0A= Appreciate the opportunity to provide input here. =0A= =0A= I personally don't know of any applications other than CRIU that make heavy= use of soft-dirty, and my use case is specifically focused on adding live-= migration support to CRIU on ARM. =0A= =0A= Cloud providers like AWS have pretty massive discounts for ARM-based spot i= nstances (90% last time I checked), and having live-migration in CRIU would= allow more applications to take advantage of that.=0A= =0A= As Ryan mentioned, there are two ways to achieve this - add dirty tracking = to ARM (Patch 3/4), or tear out the existing dirty tracking code in CRIU an= d replace it with uffd-wp. =0A= =0A= I picked option one (dirty tracking in arm) because it seems to be the simp= lest way to move forward, whereas it would be a relatively heavy effort to = add uffd-wp support to CRIU. =0A= =0A= From a performance perspective I am also a little worried that uffd will be= slower than just tracking the dirty bits asynchronously with sw dirty, but= maybe that's not as much of a concern with the addition of uffd-wp async. = =0A= =0A= With all this being said, I'll defer to the wisdom of the crowd about which= approach makes more sense - after all, with this patch we should get uffd-= wp support on arm so at least there will be _a_ way forward for CRIU (albei= t one requiring slightly more work). =0A= =0A= Thanks,=0A= Shivansh=