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d="scan'208";a="54552844" Received: from mpkangas-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.63.92]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 07:43:06 -0700 Date: Fri, 19 Apr 2024 17:42:59 +0300 From: Aapo Vienamo To: Linus Walleij Cc: Bartosz Golaszewski , Andy Shevchenko , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Mika Westerberg , Andy Shevchenko Subject: Re: [PATCH] gpio: Add Intel Granite Rapids-D vGPIO driver Message-ID: References: <20240419080555.97343-1-aapo.vienamo@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Hi Linus, Thanks for the review! On Fri, Apr 19, 2024 at 03:11:23PM GMT, Linus Walleij wrote: > On Fri, Apr 19, 2024 at 10:07 AM Aapo Vienamo > > +static int gnr_gpio_configure_pad(struct gpio_chip *gc, unsigned int gpio, > > + u32 clear_mask, u32 set_mask) > > +{ > > + struct gnr_gpio *priv = gpiochip_get_data(gc); > > + void __iomem *addr = gnr_gpio_get_padcfg_addr(priv, gpio); > > + u32 dw; > > + > > + if (test_bit(gpio, priv->ro_bitmap)) > > + return -EACCES; > > + > > + guard(raw_spinlock_irqsave)(&priv->lock); > > + > > + dw = readl(addr); > > + dw &= ~clear_mask; > > + dw |= set_mask; > > + writel(dw, addr); > > + > > + return 0; > > +} > > Configure pad sounds like pin control so it's a bit of icky name. > What it really does is configure the direction (in or out) for this > GPIO pad. And it's not really the *pad* that is configured, right? > It is the hardware *driver* for the pad, i.e. what is reflected in > the GPIO line control register. > > Can you rename this: > gnr_gpio_configure_direction()? I do agree that the pad part of the name maybe isn't the best, though this function isn't just for direction control, since it's used for setting the pin output state as well in gnr_gpio_set(). The idea is that locking and masking of the register accesses is factored out of the gpio callbacks and implemented in this function. Maybe gnr_gpio_configure_pin()? Best regards, Aapo