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AJvYcCWqzwa1FijiMUJYH1aTf/xhHF48ZLzR+QxUdd7QzMIwQFDtlogjEQPoFxra9j3CDMBTGR7Km1Ln6L7GdXC5G/ogQ9P1pd3H/H81ipeEa50AFhaRoLjf1ltQQaKDax6dDUorxJNOeIltobQo X-Gm-Message-State: AOJu0Yw4EzEM0O4MwlBNORvOpf62yNT9JWS8hwY9QiwzdCbph386SVP1 s542pfjyGK++0aSachmYRL/SZo5uY4lhw+EPNPPKJ1C1nwVGqtTxeCq6hB758j8/2QbM5a+2dkt U2aPuVkPQvI1AYPhhDiAOrt4TmmE= X-Received: by 2002:a05:6512:3602:b0:518:d079:ffd9 with SMTP id f2-20020a056512360200b00518d079ffd9mr5121751lfs.13.1713774800851; Mon, 22 Apr 2024 01:33:20 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240420182223.1153195-1-rilian.la.te@ya.ru> <20240420182223.1153195-4-rilian.la.te@ya.ru> <7cf31245-b2a1-419c-add6-a6a50a3f3cf1@kernel.org> In-Reply-To: <7cf31245-b2a1-419c-add6-a6a50a3f3cf1@kernel.org> From: "Konstantin P." Date: Mon, 22 Apr 2024 11:35:32 +0300 Message-ID: Subject: Re: [PATCH v5 3/3] serial: sc16is7xx: add support for EXAR XR20M1172 UART To: Jiri Slaby Cc: Konstantin Pugin , krzk@kernel.org, conor@kernel.org, lkp@intel.com, vz@mleia.com, robh@kernel.org, jcmvbkbc@gmail.com, nicolas.ferre@microchip.com, manikanta.guntupalli@amd.com, corbet@lwn.net, ychuang3@nuvoton.com, u.kleine-koenig@pengutronix.de, Maarten.Brock@sttls.nl, Greg Kroah-Hartman , Jernej Skrabec , Herve Codina , Andy Shevchenko , Hugo Villeneuve , Lech Perczak , =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable I do not think this is a requirement for a new version. I need to wait. Some folks want to test my patches with their hardware))) On Mon, Apr 22, 2024 at 9:30=E2=80=AFAM Jiri Slaby w= rote: > > On 20. 04. 24, 20:22, Konstantin Pugin wrote: > > From: Konstantin Pugin > > > > XR20M1172 register set is mostly compatible with SC16IS762, but it has > > a support for additional division rates of UART with special DLD regist= er. > > So, add handling this register by appropriate devicetree bindings. > ... > > --- a/drivers/tty/serial/sc16is7xx.c > > +++ b/drivers/tty/serial/sc16is7xx.c > ... > > @@ -555,18 +578,43 @@ static bool sc16is7xx_regmap_noinc(struct device = *dev, unsigned int reg) > > return reg =3D=3D SC16IS7XX_RHR_REG; > > } > > > > +static bool sc16is7xx_has_dld(struct device *dev) > > +{ > > + struct sc16is7xx_port *s =3D dev_get_drvdata(dev); > > + > > + if (s->devtype =3D=3D &xr20m1172_devtype) > > + return true; > > + return false; > > :) so this should simply be: > > return s->devtype =3D=3D &xr20m1172_devtype; > > ... > > @@ -1002,6 +1052,7 @@ static void sc16is7xx_set_termios(struct uart_por= t *port, > > const struct ktermios *old) > > { > > struct sc16is7xx_one *one =3D to_sc16is7xx_one(port, port); > > + bool has_dld =3D sc16is7xx_has_dld(port->dev); > > unsigned int lcr, flow =3D 0; > > int baud; > > unsigned long flags; > > @@ -1084,7 +1135,7 @@ static void sc16is7xx_set_termios(struct uart_por= t *port, > > /* Get baud rate generator configuration */ > > baud =3D uart_get_baud_rate(port, termios, old, > > port->uartclk / 16 / 4 / 0xffff, > > - port->uartclk / 16); > > + port->uartclk / (has_dld ? 4 : 16)); > > Could you do this instead: > unsigned int divisor =3D sc16is7xx_has_dld(port->dev) ? 4 : 16; > > ... > > uart_get_baud_rate(..., port->uartclk / divisor); > > > I am not sure the above warrants for a new version. Just in case you are > sending one. > > thanks, > -- > js > suse labs >