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Mon, 22 Apr 2024 06:39:46 -0500 Received: from [172.24.227.220] (chintan-thinkstation-p360-tower.dhcp.ti.com [172.24.227.220]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43MBdfeg004953; Mon, 22 Apr 2024 06:39:42 -0500 Message-ID: <67c7f423-18ce-4804-8be9-cc4521733cd2@ti.com> Date: Mon, 22 Apr 2024 17:09:41 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next v8 0/2] Enable RX HW timestamp for PTP packets using CPTS FIFO Content-Language: en-US To: Julien Panis , Arnd Bergmann , Dan Carpenter , Heiner Kallweit , Vladimir Oltean , Andrew Lunn , Roger Quadros , Richard Cochran , Paolo Abeni , Jakub Kicinski , Eric Dumazet , "David S. Miller" , CC: , References: <20240419082626.57225-1-c-vankar@ti.com> From: Chintan Vankar In-Reply-To: <20240419082626.57225-1-c-vankar@ti.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 19/04/24 13:56, Chintan Vankar wrote: > The CPSW offers two mechanisms for communicating packet ingress timestamp > information to the host. > > The first mechanism is via the CPTS Event FIFO which records timestamp > when triggered by certain events. One such event is the reception of an > Ethernet packet with a specified EtherType field. This is used to capture > ingress timestamps for PTP packets. With this mechanism the host must > read the timestamp (from the CPTS FIFO) separately from the packet payload > which is delivered via DMA. > > In the second mechanism of timestamping, CPSW driver enables hardware > timestamping for all received packets by setting the TSTAMP_EN bit in > CPTS_CONTROL register, which directs the CPTS module to timestamp all > received packets, followed by passing timestamp via DMA descriptors. > This mechanism is responsible for triggering errata i2401: > "CPSW: Host Timestamps Cause CPSW Port to Lock up." > > The errata affects all K3 SoCs. Link to errata for AM64x: > https://www.ti.com/lit/er/sprz457h/sprz457h.pdf > > As a workaround we can use first mechanism to timestamp received > packets. > > Series is based on linux-next tagged next-20240419. > > Link to v7: > https://lore.kernel.org/r/20240417120913.3811519-1-c-vankar@ti.com/ > > Changes from v7 to v8: > - Removed empty lines between trailers in [PATCH v7 2/2] as suggested > by Jakub. > Is it possible to merge this series if no further comment ? > Chintan Vankar (2): > net: ethernet: ti: am65-cpts: Enable RX HW timestamp for PTP packets > using CPTS FIFO > net: ethernet: ti: am65-cpsw/ethtool: Enable RX HW timestamp only for > PTP packets > > drivers/net/ethernet/ti/am65-cpsw-ethtool.c | 13 ++- > drivers/net/ethernet/ti/am65-cpsw-nuss.c | 51 +++++----- > drivers/net/ethernet/ti/am65-cpts.c | 107 ++++++++++++++------ > drivers/net/ethernet/ti/am65-cpts.h | 11 +- > 4 files changed, 118 insertions(+), 64 deletions(-) >