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From: "Konstantin P." <ria.freelander@gmail.com>
Date: Mon, 22 Apr 2024 15:00:18 +0300
Message-ID: <CAF1WSuwCdonhyzAKX6EeyWAHNX11bV+tgCLJ4vXuEXTAceVvzA@mail.gmail.com>
Subject: Re: [PATCH v5 3/3] serial: sc16is7xx: add support for EXAR XR20M1172 UART
To: Jiri Slaby <jirislaby@kernel.org>
Cc: Konstantin Pugin <rilian.la.te@ya.ru>, krzk@kernel.org, conor@kernel.org, lkp@intel.com, 
	vz@mleia.com, robh@kernel.org, jcmvbkbc@gmail.com, 
	nicolas.ferre@microchip.com, manikanta.guntupalli@amd.com, corbet@lwn.net, 
	ychuang3@nuvoton.com, u.kleine-koenig@pengutronix.de, Maarten.Brock@sttls.nl, 
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jernej Skrabec <jernej.skrabec@gmail.com>, 
	Herve Codina <herve.codina@bootlin.com>, 
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>, 
	Hugo Villeneuve <hvilleneuve@dimonoff.com>, Lech Perczak <lech.perczak@camlingroup.com>, 
	=?UTF-8?Q?Ilpo_J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>, 
	linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org
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On Mon, Apr 22, 2024 at 9:30=E2=80=AFAM Jiri Slaby <jirislaby@kernel.org> w=
rote:
>
> On 20. 04. 24, 20:22, Konstantin Pugin wrote:
> > From: Konstantin Pugin <ria.freelander@gmail.com>
> >
> > XR20M1172 register set is mostly compatible with SC16IS762, but it has
> > a support for additional division rates of UART with special DLD regist=
er.
> > So, add handling this register by appropriate devicetree bindings.
> ...
> > --- a/drivers/tty/serial/sc16is7xx.c
> > +++ b/drivers/tty/serial/sc16is7xx.c
> ...
> > @@ -555,18 +578,43 @@ static bool sc16is7xx_regmap_noinc(struct device =
*dev, unsigned int reg)
> >       return reg =3D=3D SC16IS7XX_RHR_REG;
> >   }
> >
> > +static bool sc16is7xx_has_dld(struct device *dev)
> > +{
> > +             struct sc16is7xx_port *s =3D dev_get_drvdata(dev);
> > +
> > +             if (s->devtype =3D=3D &xr20m1172_devtype)
> > +                     return true;
> > +             return false;
>
> :) so this should simply be:
>
> return s->devtype =3D=3D &xr20m1172_devtype;
>
I especially want to avoid this construction, because it will lead to
idea than we does not have other
DLD-capable UARTS, which is simply not true, there is, for example,
XR20M1280 UART, which has roughly the same register set
(https://www.alldatasheet.com/datasheet-pdf/pdf/445109/EXAR/XR20M1280.html)=
.
I simply do not have other devices, so I do not
want to risk sending untested patches upstream.

> ...
> > @@ -1002,6 +1052,7 @@ static void sc16is7xx_set_termios(struct uart_por=
t *port,
> >                                 const struct ktermios *old)
> >   {
> >       struct sc16is7xx_one *one =3D to_sc16is7xx_one(port, port);
> > +     bool has_dld =3D sc16is7xx_has_dld(port->dev);
> >       unsigned int lcr, flow =3D 0;
> >       int baud;
> >       unsigned long flags;
> > @@ -1084,7 +1135,7 @@ static void sc16is7xx_set_termios(struct uart_por=
t *port,
> >       /* Get baud rate generator configuration */
> >       baud =3D uart_get_baud_rate(port, termios, old,
> >                                 port->uartclk / 16 / 4 / 0xffff,
> > -                               port->uartclk / 16);
> > +                               port->uartclk / (has_dld ? 4 : 16));
>
> Could you do this instead:
> unsigned int divisor =3D sc16is7xx_has_dld(port->dev) ? 4 : 16;
>
> ...
>
> uart_get_baud_rate(..., port->uartclk / divisor);
>
>
> I am not sure the above warrants for a new version. Just in case you are
> sending one.
>
> thanks,
> --
> js
> suse labs
>