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From: Adam Ford <aford173@gmail.com>
Date: Mon, 22 Apr 2024 08:04:25 -0500
Message-ID: <CAHCN7x+R5t5o13tFrQ1trH1LTPshSOOvuerDpUTY++Umqwr=WA@mail.gmail.com>
Subject: Re: [PATCH V2 2/2] drm/bridge: samsung-dsim: Fix porch calcalcuation rounding
To: Marek Vasut <marex@denx.de>
Cc: dri-devel@lists.freedesktop.org, aford@beaconembedded.com, 
	Frieder Schrempf <frieder.schrempf@kontron.de>, Inki Dae <inki.dae@samsung.com>, 
	Jagan Teki <jagan@amarulasolutions.com>, Marek Szyprowski <m.szyprowski@samsung.com>, 
	Andrzej Hajda <andrzej.hajda@intel.com>, Neil Armstrong <neil.armstrong@linaro.org>, 
	Robert Foss <rfoss@kernel.org>, Laurent Pinchart <Laurent.pinchart@ideasonboard.com>, 
	Jonas Karlman <jonas@kwiboo.se>, Jernej Skrabec <jernej.skrabec@gmail.com>, 
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, Maxime Ripard <mripard@kernel.org>, 
	Thomas Zimmermann <tzimmermann@suse.de>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, 
	Marco Felsch <m.felsch@pengutronix.de>, Michael Tretter <m.tretter@pengutronix.de>, 
	linux-kernel@vger.kernel.org
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On Mon, Apr 22, 2024 at 8:01=E2=80=AFAM Marek Vasut <marex@denx.de> wrote:
>
> On 4/22/24 2:09 PM, Adam Ford wrote:
> > On Sun, Apr 21, 2024 at 9:36=E2=80=AFAM Marek Vasut <marex@denx.de> wro=
te:
> >>
> >> On 2/12/24 12:09 AM, Adam Ford wrote:
> >>> When using video sync pulses, the HFP, HBP, and HSA are divided betwe=
en
> >>> the available lanes if there is more than one lane.  For certain
> >>> timings and lane configurations, the HFP may not be evenly divisible.
> >>> If the HFP is rounded down, it ends up being too small which can caus=
e
> >>> some monitors to not sync properly. In these instances, adjust htotal
> >>> and hsync to round the HFP up, and recalculate the htotal.
> >>>
> >>> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> # Kontron B=
L i.MX8MM with HDMI monitor
> >>> Signed-off-by: Adam Ford <aford173@gmail.com>
> >>> ---
> >>> V2:  No changes
> >>>
> >>> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/=
bridge/samsung-dsim.c
> >>> index 8476650c477c..52939211fe93 100644
> >>> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> >>> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> >>> @@ -1606,6 +1606,27 @@ static int samsung_dsim_atomic_check(struct dr=
m_bridge *bridge,
> >>>                adjusted_mode->flags |=3D (DRM_MODE_FLAG_PHSYNC | DRM_=
MODE_FLAG_PVSYNC);
> >>>        }
> >>>
> >>> +     /*
> >>> +      * When using video sync pulses, the HFP, HBP, and HSA are divi=
ded between
> >>> +      * the available lanes if there is more than one lane.  For cer=
tain
> >>> +      * timings and lane configurations, the HFP may not be evenly d=
ivisible.
> >>> +      * If the HFP is rounded down, it ends up being too small which=
 can cause
> >>> +      * some monitors to not sync properly. In these instances, adju=
st htotal
> >>> +      * and hsync to round the HFP up, and recalculate the htotal. T=
hrough trial
> >>> +      * and error, it appears that the HBP and HSA do not appearto n=
eed the same
> >>> +      * correction that HFP does.
> >>> +      */
> >>> +     if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE && dsi->la=
nes > 1) {
> >>
> >> Does this also apply to mode with sync events (I suspect it does), so
> >> the condition here should likely be if (!...burst mode) , right ?
> >
> > Thanks for the review!
> >
> > I was only able to test it with the DSI->ADV6535 bridge, and I'll
> > admit I don't know a lot about DSI interface since I don't have a copy
> > of the spec to read.
> >
> > Are you proposing this should be:
> >
> >   if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) && dsi->lanes > 1)=
 {
> >
> > I just want to make sure I understand what you're requesting.
>
> Yes, exactly this.

Do you think it should also include checks for
MIPI_DSI_MODE_VIDEO_NO_HFP, MIPI_DSI_MODE_VIDEO_NO_HBP or
MIPI_DSI_MODE_VIDEO_NO_HSA?

It seems like if any of these are set, we should skip this rounding stuff.

adam