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Mon, 22 Apr 2024 15:01:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1713790870; bh=Id/NSNaXyVXY6rBoqDKvTGFS4QH4FIlYm4f/5nPxJnw=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=K13OrbP5qgRfQrO584HKME2f6P7aPXqk8CP/Dp6Aek6PqBDW3amI+gmIzxmjmB9gu DdKNNDDbReArJYtr59e8OTwDiYYQy6W/hpj865hr9il/rEexi2/jQ51yO99OTl8CPs OX6s1AU+xl9scUWb8nSGGRTvQpnXp+YLP8jiywO8r/6q+oImRLQKAJTestnWA/waoe 6Oya8yTiWkmqiVIFJg7JGEzevkk+UAKdDtedvxzDckHirFCl/h0/nrmTOhgi4btWJ/ C3x2xnWeU3RFWM8TQWcy46O9LQC+hWpsf15ngvepppVjeoAnbsDYk+xwmi/eRi6kFx MZq4w8QyTEC+w== Message-ID: <47b26a19-9aba-4380-9d05-f06bd8bc20b1@denx.de> Date: Mon, 22 Apr 2024 14:30:59 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V2 2/2] drm/bridge: samsung-dsim: Fix porch calcalcuation rounding To: Adam Ford Cc: dri-devel@lists.freedesktop.org, aford@beaconembedded.com, Frieder Schrempf , Inki Dae , Jagan Teki , Marek Szyprowski , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Marco Felsch , Michael Tretter , linux-kernel@vger.kernel.org References: <20240211230931.188194-1-aford173@gmail.com> <20240211230931.188194-2-aford173@gmail.com> <6111fe04-4ecb-428e-9a0c-dc02cadfe3e7@denx.de> Content-Language: en-US From: Marek Vasut In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 4/22/24 2:09 PM, Adam Ford wrote: > On Sun, Apr 21, 2024 at 9:36 AM Marek Vasut wrote: >> >> On 2/12/24 12:09 AM, Adam Ford wrote: >>> When using video sync pulses, the HFP, HBP, and HSA are divided between >>> the available lanes if there is more than one lane. For certain >>> timings and lane configurations, the HFP may not be evenly divisible. >>> If the HFP is rounded down, it ends up being too small which can cause >>> some monitors to not sync properly. In these instances, adjust htotal >>> and hsync to round the HFP up, and recalculate the htotal. >>> >>> Tested-by: Frieder Schrempf # Kontron BL i.MX8MM with HDMI monitor >>> Signed-off-by: Adam Ford >>> --- >>> V2: No changes >>> >>> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c >>> index 8476650c477c..52939211fe93 100644 >>> --- a/drivers/gpu/drm/bridge/samsung-dsim.c >>> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c >>> @@ -1606,6 +1606,27 @@ static int samsung_dsim_atomic_check(struct drm_bridge *bridge, >>> adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); >>> } >>> >>> + /* >>> + * When using video sync pulses, the HFP, HBP, and HSA are divided between >>> + * the available lanes if there is more than one lane. For certain >>> + * timings and lane configurations, the HFP may not be evenly divisible. >>> + * If the HFP is rounded down, it ends up being too small which can cause >>> + * some monitors to not sync properly. In these instances, adjust htotal >>> + * and hsync to round the HFP up, and recalculate the htotal. Through trial >>> + * and error, it appears that the HBP and HSA do not appearto need the same >>> + * correction that HFP does. >>> + */ >>> + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE && dsi->lanes > 1) { >> >> Does this also apply to mode with sync events (I suspect it does), so >> the condition here should likely be if (!...burst mode) , right ? > > Thanks for the review! > > I was only able to test it with the DSI->ADV6535 bridge, and I'll > admit I don't know a lot about DSI interface since I don't have a copy > of the spec to read. > > Are you proposing this should be: > > if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) && dsi->lanes > 1) { > > I just want to make sure I understand what you're requesting. Yes, exactly this.