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References: <20240422123801.2695129-1-rilian.la.te@ya.ru> <20240422123801.2695129-2-rilian.la.te@ya.ru>
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From: "Konstantin P." <ria.freelander@gmail.com>
Date: Mon, 22 Apr 2024 16:20:40 +0300
Message-ID: <CAF1WSuxPmzWYhCQU3tiA_GYMLowxMuvEJWRv83atithv8NCRxg@mail.gmail.com>
Subject: Re: [PATCH v6 1/3] serial: sc16is7xx: announce support of SER_RS485_RTS_ON_SEND
To: Andy Shevchenko <andy@kernel.org>
Cc: Konstantin Pugin <rilian.la.te@ya.ru>, krzk@kernel.org, conor@kernel.org, lkp@intel.com, 
	vz@mleia.com, robh@kernel.org, jcmvbkbc@gmail.com, 
	nicolas.ferre@microchip.com, manikanta.guntupalli@amd.com, corbet@lwn.net, 
	ychuang3@nuvoton.com, u.kleine-koenig@pengutronix.de, Maarten.Brock@sttls.nl, 
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jiri Slaby <jirislaby@kernel.org>, 
	Hugo Villeneuve <hvilleneuve@dimonoff.com>, Lech Perczak <lech.perczak@camlingroup.com>, 
	=?UTF-8?Q?Ilpo_J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>, 
	linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org
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On Mon, Apr 22, 2024 at 3:56=E2=80=AFPM Andy Shevchenko <andy@kernel.org> w=
rote:
>
> On Mon, Apr 22, 2024 at 03:37:55PM +0300, Konstantin Pugin wrote:
> > From: Konstantin Pugin <ria.freelander@gmail.com>
> >
> > The hardware supports both RTS_ON_SEND and RTS_AFTER_SEND modes, but
> > after the commit 4afeced55baa ("serial: core: fix sanitizing check for
> > RTS settings") we always end up with SER_RS485_RTS_AFTER_SEND set and
> > always write to the register field SC16IS7XX_EFCR_RTS_INVERT_BIT, which
> > breaks some hardware using these chips.
>
> LGTM, but I leave it to Hugo for testing and other comments, if any,
> as I don't have a HW.
>
> Reviewed-by: Andy Shevchenko <andy@kernel.org>
>
> --
> With Best Regards,
> Andy Shevchenko
>
>

Andy, I need to do v7 (because there is a missed fix), but Yandex do
not allow me to send more mail( So, can it be sent next day?