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Message-ID: <9c83bd1e-8753-4f25-a1d9-97f106db4bb2@linaro.org>
Date: Mon, 22 Apr 2024 18:05:03 +0200
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From: Neil Armstrong <neil.armstrong@linaro.org>
Reply-To: neil.armstrong@linaro.org
Subject: Re: [PATCH v4 0/3] arm64: qcom: sm8650: add support for the
 SM8650-HDK board
To: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
 linux-kernel@vger.kernel.org,
 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
 Konrad Dybcio <konrad.dybcio@linaro.org>, linux-arm-msm@vger.kernel.org,
 Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
 Bjorn Andersson <andersson@kernel.org>,
 Krzysztof Kozlowski <krzk+dt@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
References: <20240422-topic-sm8650-upstream-hdk-v4-0-b33993eaa2e8@linaro.org>
 <171378646269.749144.3843772037586831461.robh@kernel.org>
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Organization: Linaro
In-Reply-To: <171378646269.749144.3843772037586831461.robh@kernel.org>
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On 22/04/2024 13:50, Rob Herring wrote:
> 
> On Mon, 22 Apr 2024 10:48:11 +0200, Neil Armstrong wrote:
>> The SM8650-HDK is an embedded development platforms for the
>> Snapdragon 8 Gen 3 SoC aka SM8650, with the following features:
>> - Qualcomm SM8650 SoC
>> - 16GiB On-board LPDDR5
>> - On-board WiFi 7 + Bluetooth 5.3/BLE
>> - On-board UFS4.0
>> - M.2 Key B+M Gen3x2 PCIe Slot
>> - HDMI Output
>> - USB-C Connector with DP Almode & Audio Accessory mode
>> - Micro-SDCard Slot
>> - Audio Jack with Playback and Microphone
>> - 2 On-board Analog microphones
>> - 2 On-board Speakers
>> - 96Boards Compatible Low-Speed and High-Speed connectors [1]
>> - For Camera, Sensors and external Display cards
>> - Compatible with the Linaro Debug board [2]
>> - SIM Slot for Modem
>> - Debug connectors
>> - 6x On-Board LEDs
>>
>> An optional Display Card kit can be connected on top,
>> an overlay is handled to add support for the DSI Display
>> and Touch Controller.
>>
>> Product Page: [3]
>>
>> Build Dependencies: None
>>
>> Functional Dependencies:
>> - PCIe 1 PHY AUX Clock: https://lore.kernel.org/all/20240322-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v2-0-3ec0a966d52f@linaro.org/
>> - PCI-MSI Fix: https://lore.kernel.org/all/20240318-pci-bdf-sid-fix-v1-3-acca6c5d9cf1@linaro.org/
>> - UCSI Fix: https://lore.kernel.org/all/20240315171836.343830-1-jthies@google.com/
>> - USB IRQs DT check fix: https://lore.kernel.org/all/20240314-topic-sm8650-upstream-usb-dt-irq-fix-v1-1-ea8ab2051869@linaro.org/
>>
>> [1] https://www.96boards.org/specifications/
>> [2] https://git.codelinaro.org/linaro/qcomlt/debugboard
>> [3] https://www.lantronix.com/products/snapdragon-8-gen-3-mobile-hardware-development-kit/
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>> Changes in v4:
>> - Rebased on next and fixed the apply failures
>> - Link to v3: https://lore.kernel.org/r/20240325-topic-sm8650-upstream-hdk-v3-0-4f365d7932af@linaro.org
>>
>> Changes in v3:
>> - fixed regulator node name to fix ordering
>> - deleted pcie_1_phy_aux clock
>> - removed undeeded mdss_mdp status okay
>> - collected revied & tested tags
>> - Link to v2: https://lore.kernel.org/r/20240318-topic-sm8650-upstream-hdk-v2-0-b63a5d45a784@linaro.org
>>
>> Changes in v2:
>> - Fixed commit messages with links, and recently added product page URL
>> - Swapped i2c3/i2c6 nodes
>> - Moved pcie_1_phy_aux_clk under pcie1_phy
>> - Removed duplicate mdp_vsync pinctrl state
>> - Collected review & tested tags
>> - Link to v1: https://lore.kernel.org/r/20240223-topic-sm8650-upstream-hdk-v1-0-ccca645cd901@linaro.org
>>
>> ---
>> Neil Armstrong (3):
>>        dt-bindings: arm: qcom: Document the HDK8650 board
>>        arm64: dts: qcom: sm8650: add support for the SM8650-HDK board
>>        arch: arm64: dts: sm8650-hdk: add support for the Display Card overlay
>>
>>   Documentation/devicetree/bindings/arm/qcom.yaml    |    1 +
>>   arch/arm64/boot/dts/qcom/Makefile                  |    5 +
>>   .../boot/dts/qcom/sm8650-hdk-display-card.dtso     |  144 +++
>>   arch/arm64/boot/dts/qcom/sm8650-hdk.dts            | 1251 ++++++++++++++++++++
>>   4 files changed, 1401 insertions(+)
>> ---
>> base-commit: a8e1147ee205e7b8dfe18094ed39552a982857f1
>> change-id: 20240223-topic-sm8650-upstream-hdk-e21cfd6f1de8
>>
>> Best regards,
>> --
>> Neil Armstrong <neil.armstrong@linaro.org>
>>
>>
>>
> 
> 
> My bot found new DTB warnings on the .dts files added or changed in this
> series.
> 
> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
> are fixed by another series. Ultimately, it is up to the platform
> maintainer whether these warnings are acceptable or not. No need to reply
> unless the platform maintainer has comments.
> 
> If you already ran DT checks and didn't see these error(s), then
> make sure dt-schema is up to date:
> 
>    pip3 install dtschema --upgrade
> 
> 
> New warnings running 'make CHECK_DTBS=y qcom/sm8650-hdk.dtb' for 20240422-topic-sm8650-upstream-hdk-v4-0-b33993eaa2e8@linaro.org:
> 
> arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: pcie-1-phy-aux-clk: 'clock-frequency' is a required property
> 	from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: phy@1c0e000: clock-output-names: ['pcie1_pipe_clk'] is too short
> 	from schema $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#
> arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: phy@1c0e000: #clock-cells:0:0: 1 was expected
> 	from schema $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#

Thx, this is fixed by https://lore.kernel.org/all/20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-0-799475a27cce@linaro.org/

Neil

> 
> 
> 
> 
>