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References: <20240411231844.3306037-1-vanshikonda@os.amperecomputing.com>
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From: "Rafael J. Wysocki" <rafael@kernel.org>
Date: Mon, 22 Apr 2024 19:00:15 +0200
Message-ID: <CAJZ5v0hHbnVb8jnqd+o-GMS+Pw=UMq-7LQekBWWpNqTkBNfUWA@mail.gmail.com>
Subject: Re: [PATCH v3] ACPI: CPPC: Fix access width used for PCC registers
To: Vanshidhar Konda <vanshikonda@os.amperecomputing.com>
Cc: Jarred White <jarredwhite@linux.microsoft.com>, 
	Easwar Hariharan <eahariha@linux.microsoft.com>, 
	"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>, linux-acpi@vger.kernel.org, 
	linux-kernel@vger.kernel.org, "5 . 15+" <stable@vger.kernel.org>
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On Fri, Apr 12, 2024 at 1:18=E2=80=AFAM Vanshidhar Konda
<vanshikonda@os.amperecomputing.com> wrote:
>
> commit 2f4a4d63a193be6fd530d180bb13c3592052904c modified
> cpc_read/cpc_write to use access_width to read CPC registers. For PCC
> registers the access width field in the ACPI register macro specifies
> the PCC subspace id. For non-zero PCC subspace id the access width is
> incorrectly treated as access width. This causes errors when reading
> from PCC registers in the CPPC driver.
>
> For PCC registers base the size of read/write on the bit width field.
> The debug message in cpc_read/cpc_write is updated to print relevant
> information for the address space type used to read the register.
>
> Signed-off-by: Vanshidhar Konda <vanshikonda@os.amperecomputing.com>
> Tested-by: Jarred White <jarredwhite@linux.microsoft.com>
> Reviewed-by: Jarred White <jarredwhite@linux.microsoft.com>
> Reviewed-by: Easwar Hariharan <eahariha@linux.microsoft.com>
> Cc: 5.15+ <stable@vger.kernel.org> # 5.15+
> ---
>
> When testing v6.9-rc1 kernel on AmpereOne system dmesg showed that
> cpufreq policy had failed to initialize on some cores during boot because
> cpufreq->get() always returned 0. On this system CPPC registers are in PC=
C
> subspace index 2 that are 32 bits wide. With this patch the CPPC driver
> interpreted the access width field as 16 bits, causing the register read
> to roll over too quickly to provide valid values during frequency
> computation.
>
> v2:
> - Use size variable in debug print message
> - Use size instead of reg->bit_width for acpi_os_read_memory and
>   acpi_os_write_memory
>
> v3:
> - Fix language in error messages in cpc_read/cpc_write
>
>  drivers/acpi/cppc_acpi.c | 53 ++++++++++++++++++++++++++++------------
>  1 file changed, 37 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
> index 4bfbe55553f4..7d476988fae3 100644
> --- a/drivers/acpi/cppc_acpi.c
> +++ b/drivers/acpi/cppc_acpi.c
> @@ -1002,14 +1002,14 @@ static int cpc_read(int cpu, struct cpc_register_=
resource *reg_res, u64 *val)
>         }
>
>         *val =3D 0;
> +       size =3D GET_BIT_WIDTH(reg);
>
>         if (reg->space_id =3D=3D ACPI_ADR_SPACE_SYSTEM_IO) {
> -               u32 width =3D GET_BIT_WIDTH(reg);
>                 u32 val_u32;
>                 acpi_status status;
>
>                 status =3D acpi_os_read_port((acpi_io_address)reg->addres=
s,
> -                                          &val_u32, width);
> +                                          &val_u32, size);
>                 if (ACPI_FAILURE(status)) {
>                         pr_debug("Error: Failed to read SystemIO port %ll=
x\n",
>                                  reg->address);
> @@ -1018,17 +1018,22 @@ static int cpc_read(int cpu, struct cpc_register_=
resource *reg_res, u64 *val)
>
>                 *val =3D val_u32;
>                 return 0;
> -       } else if (reg->space_id =3D=3D ACPI_ADR_SPACE_PLATFORM_COMM && p=
cc_ss_id >=3D 0)
> +       } else if (reg->space_id =3D=3D ACPI_ADR_SPACE_PLATFORM_COMM && p=
cc_ss_id >=3D 0) {
> +               /*
> +                * For registers in PCC space, the register size is deter=
mined
> +                * by the bit width field; the access size is used to ind=
icate
> +                * the PCC subspace id.
> +                */
> +               size =3D reg->bit_width;
>                 vaddr =3D GET_PCC_VADDR(reg->address, pcc_ss_id);
> +       }
>         else if (reg->space_id =3D=3D ACPI_ADR_SPACE_SYSTEM_MEMORY)
>                 vaddr =3D reg_res->sys_mem_vaddr;
>         else if (reg->space_id =3D=3D ACPI_ADR_SPACE_FIXED_HARDWARE)
>                 return cpc_read_ffh(cpu, reg, val);
>         else
>                 return acpi_os_read_memory((acpi_physical_address)reg->ad=
dress,
> -                               val, reg->bit_width);
> -
> -       size =3D GET_BIT_WIDTH(reg);
> +                               val, size);
>
>         switch (size) {
>         case 8:
> @@ -1044,8 +1049,13 @@ static int cpc_read(int cpu, struct cpc_register_r=
esource *reg_res, u64 *val)
>                 *val =3D readq_relaxed(vaddr);
>                 break;
>         default:
> -               pr_debug("Error: Cannot read %u bit width from PCC for ss=
: %d\n",
> -                        reg->bit_width, pcc_ss_id);
> +               if (reg->space_id =3D=3D ACPI_ADR_SPACE_SYSTEM_MEMORY) {
> +                       pr_debug("Error: Cannot read %u bit width from sy=
stem memory: 0x%llx\n",
> +                               size, reg->address);
> +               } else if (reg->space_id =3D=3D ACPI_ADR_SPACE_PLATFORM_C=
OMM) {
> +                       pr_debug("Error: Cannot read %u bit width from PC=
C for ss: %d\n",
> +                               size, pcc_ss_id);
> +               }
>                 return -EFAULT;
>         }
>
> @@ -1063,12 +1073,13 @@ static int cpc_write(int cpu, struct cpc_register=
_resource *reg_res, u64 val)
>         int pcc_ss_id =3D per_cpu(cpu_pcc_subspace_idx, cpu);
>         struct cpc_reg *reg =3D &reg_res->cpc_entry.reg;
>
> +       size =3D GET_BIT_WIDTH(reg);
> +
>         if (reg->space_id =3D=3D ACPI_ADR_SPACE_SYSTEM_IO) {
> -               u32 width =3D GET_BIT_WIDTH(reg);
>                 acpi_status status;
>
>                 status =3D acpi_os_write_port((acpi_io_address)reg->addre=
ss,
> -                                           (u32)val, width);
> +                                           (u32)val, size);
>                 if (ACPI_FAILURE(status)) {
>                         pr_debug("Error: Failed to write SystemIO port %l=
lx\n",
>                                  reg->address);
> @@ -1076,17 +1087,22 @@ static int cpc_write(int cpu, struct cpc_register=
_resource *reg_res, u64 val)
>                 }
>
>                 return 0;
> -       } else if (reg->space_id =3D=3D ACPI_ADR_SPACE_PLATFORM_COMM && p=
cc_ss_id >=3D 0)
> +       } else if (reg->space_id =3D=3D ACPI_ADR_SPACE_PLATFORM_COMM && p=
cc_ss_id >=3D 0) {
> +               /*
> +                * For registers in PCC space, the register size is deter=
mined
> +                * by the bit width field; the access size is used to ind=
icate
> +                * the PCC subspace id.
> +                */
> +               size =3D reg->bit_width;
>                 vaddr =3D GET_PCC_VADDR(reg->address, pcc_ss_id);
> +       }
>         else if (reg->space_id =3D=3D ACPI_ADR_SPACE_SYSTEM_MEMORY)
>                 vaddr =3D reg_res->sys_mem_vaddr;
>         else if (reg->space_id =3D=3D ACPI_ADR_SPACE_FIXED_HARDWARE)
>                 return cpc_write_ffh(cpu, reg, val);
>         else
>                 return acpi_os_write_memory((acpi_physical_address)reg->a=
ddress,
> -                               val, reg->bit_width);
> -
> -       size =3D GET_BIT_WIDTH(reg);
> +                               val, size);
>
>         if (reg->space_id =3D=3D ACPI_ADR_SPACE_SYSTEM_MEMORY)
>                 val =3D MASK_VAL(reg, val);
> @@ -1105,8 +1121,13 @@ static int cpc_write(int cpu, struct cpc_register_=
resource *reg_res, u64 val)
>                 writeq_relaxed(val, vaddr);
>                 break;
>         default:
> -               pr_debug("Error: Cannot write %u bit width to PCC for ss:=
 %d\n",
> -                        reg->bit_width, pcc_ss_id);
> +               if (reg->space_id =3D=3D ACPI_ADR_SPACE_SYSTEM_MEMORY) {
> +                       pr_debug("Error: Cannot write %u bit width to sys=
tem memory: 0x%llx\n",
> +                               size, reg->address);
> +               } else if (reg->space_id =3D=3D ACPI_ADR_SPACE_PLATFORM_C=
OMM) {
> +                       pr_debug("Error: Cannot write %u bit width to PCC=
 for ss: %d\n",
> +                               size, pcc_ss_id);
> +               }
>                 ret_val =3D -EFAULT;
>                 break;
>         }
> --

Applied as 6.9-rc material, thanks!