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bh=4ZYJdt5C4o9SaqYmrAWBEmoNHbcJIcsCz59TkN74CEI=; b=VhCKKd2ARKVXexwfYiZcxmshqdl8yRd64VvORGpK5WwmE0g0B7Qqk4CdQRstTK2rK/d4T8 INGLOqkVhQgNLQBQ== From: "tip-bot2 for Antonio Borneo" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/core] arm64: dts: st: Add interrupt parent to pinctrl on stm32mp251 Cc: Antonio Borneo , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org In-Reply-To: <20240415134926.1254428-12-antonio.borneo@foss.st.com> References: <20240415134926.1254428-12-antonio.borneo@foss.st.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <171382590543.10875.6779801776975672013.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit The following commit has been merged into the irq/core branch of tip: Commit-ID: 7da4ba315e3980ca3e87d40a10908f716f026d2c Gitweb: https://git.kernel.org/tip/7da4ba315e3980ca3e87d40a10908f716f026d2c Author: Antonio Borneo AuthorDate: Mon, 15 Apr 2024 15:49:26 +02:00 Committer: Thomas Gleixner CommitterDate: Tue, 23 Apr 2024 00:28:16 +02:00 arm64: dts: st: Add interrupt parent to pinctrl on stm32mp251 Add exti1 as interrupt parent for the two pin controllers. Add the additional required property st,syscfg. Signed-off-by: Antonio Borneo Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/r/20240415134926.1254428-12-antonio.borneo@foss.st.com --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 1426446..e7d1614 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -271,6 +271,8 @@ #size-cells = <1>; compatible = "st,stm32mp257-pinctrl"; ranges = <0 0x44240000 0xa0400>; + interrupt-parent = <&exti1>; + st,syscfg = <&exti1 0x60 0xff>; pins-are-numbered; gpioa: gpio@44240000 { @@ -400,6 +402,8 @@ #size-cells = <1>; compatible = "st,stm32mp257-z-pinctrl"; ranges = <0 0x46200000 0x400>; + interrupt-parent = <&exti1>; + st,syscfg = <&exti1 0x60 0xff>; pins-are-numbered; gpioz: gpio@46200000 {