Received: by 2002:ab2:6203:0:b0:1f5:f2ab:c469 with SMTP id o3csp2598574lqt; Mon, 22 Apr 2024 16:06:53 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCXbfo7+ouAk7pV/8Avx7RAmzHQA0jcWthsqTb4PCQvjzyqJ1+kb06mqW4gKRmsaEj81xQ/oEDMzsDCtu+uUa9/Km5a569oNDu+/ewJZaw== X-Google-Smtp-Source: AGHT+IEun1SwkSBK3qxhlRidwyH7ElUuS8Q9+BC7DDs5NvUKXbsWS7jJ0f38OVU/bZZ2NJSG67vf X-Received: by 2002:a17:906:856:b0:a55:9574:48a6 with SMTP id f22-20020a170906085600b00a55957448a6mr1088958ejd.30.1713827213029; Mon, 22 Apr 2024 16:06:53 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1713827213; cv=pass; d=google.com; s=arc-20160816; b=jf2tSxJWTu1CV6SKpOhB8xCSJkNsag+uWeH7n2dH6R1c62UaWjekh8HBgSVVA3OZRG v3J2hughnjtFuCRYJmayXx0rOp/RnsACK9nCKRCFOYBOswBKBA/ucFBj820dTfgGm0Jy OsyE39OzVKCWHanEr3dlvuc4Ruzfb3aoAkwLrDGHLRC5awWUzBQhdRc8kOiiPWd6z0Y2 kXNXntamNWLBAUK2Omk4bRQcJz4Phge1rW4v6yWaVPMEKZhXCjJAVeV2ZhMyl0KKiTwS LtKk/oW0xHL+EvyurJNnlt1cees6qd7Rokp7QnasyMlDO3aq+1zmDmKci5N4313cTUA3 w8nQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :user-agent:references:message-id:in-reply-to:subject:cc:to:from :date:dkim-signature; bh=PRBJesVP1FxARzXnbDlWtTJIzEerXhR6rMN6ToolAMM=; fh=YjzU6iM0Fh+zp2j5AJNcjCtN6FMlEGoUFq31wTSiHxM=; b=oFNKkwk5MudeyVA4NhiviehmZB//ceg9FOuZgDyMuTU6fm+7YfYcoPH4JyqyS7axCM opqDyunI9E0ldCGuFaUXbJVOamYCiyryy53ALq7TLnTwNrvflM/SthzLqD21TPfQJHfB iWLhuG2EelnNDzKVAHeXfFhZEGR6wRPJ75hkZspDR/dUh4G+820EJY6gmkngXKgO0t9K RlSYTiX8C6h5NlPZJRKeptbxhDAglI5T8ufmYIRQ7XwbP6gBf1/wOiymKRA7Vy4LO9N4 jmIavoMZVKFCppnAzL1VDBN/un/ZWh96pQ7wWkV60OsOOUZoauXVCOfjIbLokvFOh09X TxBQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="Q/a8o4xX"; arc=pass (i=1 dkim=pass dkdomain=intel.com dmarc=pass fromdomain=linux.intel.com); spf=pass (google.com: domain of linux-kernel+bounces-154001-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-154001-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [147.75.80.249]) by mx.google.com with ESMTPS id i15-20020a05640242cf00b005720328e38bsi2536277edc.161.2024.04.22.16.06.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Apr 2024 16:06:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-154001-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="Q/a8o4xX"; arc=pass (i=1 dkim=pass dkdomain=intel.com dmarc=pass fromdomain=linux.intel.com); spf=pass (google.com: domain of linux-kernel+bounces-154001-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-154001-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 674201F21888 for ; Mon, 22 Apr 2024 20:40:32 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 61D761C6B7; Mon, 22 Apr 2024 20:40:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Q/a8o4xX" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D73961B27D; Mon, 22 Apr 2024 20:40:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713818412; cv=none; b=LaRHG6W1+fNuwfPaNBndyelQ1LqxICVedFyaPYphE3a5IF/cU/TymelMTbDB5S/T4u5TRPecHbFUF8F6EDK1zz2qNe2nEOPqHiLb7DoWQijK0XH1DrEW3pVNg3UDCpjhByHP9eTQiGZBR2d2klbST1WdvPAfUdrD/U9C5jHGY40= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713818412; c=relaxed/simple; bh=B7l0/65vO7+DjY80lOHywR958KdsAp0VxS0wq8JSYD8=; h=Date:From:To:cc:Subject:In-Reply-To:Message-ID:References: MIME-Version:Content-Type; b=VXaK/ao9nDALEh1OcXEywBpuBrtnwlLDrd1CubxDqlIy7T/SlMjUJVATYVBT6L5APuWy7hGVW0QLILszHB3u3FsRyF1D30GeWuHd85KOLCcn5b0//uQGRqt2+bF9C/NQzJk4OGxjgwP0lFcZtJNwr+3YSlhUcuLjmp4R/RkeI0Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Q/a8o4xX; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713818411; x=1745354411; h=date:from:to:cc:subject:in-reply-to:message-id: references:mime-version; bh=B7l0/65vO7+DjY80lOHywR958KdsAp0VxS0wq8JSYD8=; b=Q/a8o4xXZBx6Y/WfbgeO4C9MZioeEKqNzF/umbT9FxRATrF++KFY00VH KVUz3c8hsenyp9fI8e+YBhSr+ADat+cef8Qj6lMb9zXWN48hhXYwC72Kl QhrL2BuUAYT5KXkHw+EjraF9Ysz1sUYUugbwLfmwm6EDqtJL1kgjbUn12 4LvshE22gxoIGbfc05jvvUfWy1NFy1pzv4ovgTponj1T9o+drbRl29iv0 cMDfFwZs/igD3WQ3kik2iNTq094pc9v+rVLGRlsRV6DU+HP9zlJkW6czW 5+tmFfm9u48F8BynEnmcduaxQF2ZEqY5ax43NLUzO8nl1qtendWlzEa3N g==; X-CSE-ConnectionGUID: aYke8BjJRGePVDAxTygung== X-CSE-MsgGUID: nZuVrdMYR5iZ9fYo+hHMmw== X-IronPort-AV: E=McAfee;i="6600,9927,11052"; a="9548813" X-IronPort-AV: E=Sophos;i="6.07,221,1708416000"; d="scan'208";a="9548813" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2024 13:40:10 -0700 X-CSE-ConnectionGUID: 9bgKImlkQS+/6twUl2Iprg== X-CSE-MsgGUID: bGG3c9YUR261z1tgCG1Uhg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,221,1708416000"; d="scan'208";a="28804520" Received: from sj-4150-psse-sw-opae-dev2.sj.intel.com ([10.233.115.162]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2024 13:40:09 -0700 Date: Mon, 22 Apr 2024 13:40:00 -0700 (PDT) From: matthew.gerlach@linux.intel.com X-X-Sender: mgerlach@sj-4150-psse-sw-opae-dev2 To: Rob Herring cc: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4] dt-bindings: PCI: altera: Convert to YAML In-Reply-To: <20240422145855.GA1242711-robh@kernel.org> Message-ID: References: <20240420145342.118643-1-matthew.gerlach@linux.intel.com> <20240422145855.GA1242711-robh@kernel.org> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed On Mon, 22 Apr 2024, Rob Herring wrote: > On Sat, Apr 20, 2024 at 09:53:42AM -0500, matthew.gerlach@linux.intel.com wrote: >> From: Matthew Gerlach >> >> Convert the device tree bindings for the Altera Root Port PCIe controller >> from text to YAML. >> >> Signed-off-by: Matthew Gerlach >> --- >> v4: >> - reorder reg-names to match original binding >> - move reg and reg-names to top level with limits. >> >> v3: >> - Added years to copyright >> - Correct order in file of allOf and unevaluatedProperties >> - remove items: in compatible field >> - fix reg and reg-names constraints >> - replace deprecated pci-bus.yaml with pci-host-bridge.yaml >> - fix entries in ranges property >> - remove device_type from required >> >> v2: >> - Move allOf: to bottom of file, just like example-schema is showing >> - add constraint for reg and reg-names >> - remove unneeded device_type >> - drop #address-cells and #size-cells >> - change minItems to maxItems for interrupts: >> - change msi-parent to just "msi-parent: true" >> - cleaned up required: >> - make subject consistent with other commits coverting to YAML >> - s/overt/onvert/g >> --- >> .../devicetree/bindings/pci/altera-pcie.txt | 50 ----------- >> .../bindings/pci/altr,pcie-root-port.yaml | 88 +++++++++++++++++++ >> 2 files changed, 88 insertions(+), 50 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/pci/altera-pcie.txt >> create mode 100644 Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml >> >> diff --git a/Documentation/devicetree/bindings/pci/altera-pcie.txt b/Documentation/devicetree/bindings/pci/altera-pcie.txt >> deleted file mode 100644 >> index 816b244a221e..000000000000 >> --- a/Documentation/devicetree/bindings/pci/altera-pcie.txt >> +++ /dev/null >> @@ -1,50 +0,0 @@ >> -* Altera PCIe controller >> - >> -Required properties: >> -- compatible : should contain "altr,pcie-root-port-1.0" or "altr,pcie-root-port-2.0" >> -- reg: a list of physical base address and length for TXS and CRA. >> - For "altr,pcie-root-port-2.0", additional HIP base address and length. >> -- reg-names: must include the following entries: >> - "Txs": TX slave port region >> - "Cra": Control register access region >> - "Hip": Hard IP region (if "altr,pcie-root-port-2.0") >> -- interrupts: specifies the interrupt source of the parent interrupt >> - controller. The format of the interrupt specifier depends >> - on the parent interrupt controller. >> -- device_type: must be "pci" >> -- #address-cells: set to <3> >> -- #size-cells: set to <2> >> -- #interrupt-cells: set to <1> >> -- ranges: describes the translation of addresses for root ports and >> - standard PCI regions. >> -- interrupt-map-mask and interrupt-map: standard PCI properties to define the >> - mapping of the PCIe interface to interrupt numbers. >> - >> -Optional properties: >> -- msi-parent: Link to the hardware entity that serves as the MSI controller >> - for this PCIe controller. >> -- bus-range: PCI bus numbers covered >> - >> -Example >> - pcie_0: pcie@c00000000 { >> - compatible = "altr,pcie-root-port-1.0"; >> - reg = <0xc0000000 0x20000000>, >> - <0xff220000 0x00004000>; >> - reg-names = "Txs", "Cra"; >> - interrupt-parent = <&hps_0_arm_gic_0>; >> - interrupts = <0 40 4>; >> - interrupt-controller; > > What happened to this? It is clearly needed since the interrupt-map > below points back to this node. Note that that didn't work at one point > in time, but I think we fixed it. I think the DTs I was using test were created during the point in time when this did not work. The interrupt-controller boolean and #interrupt-cells property were in a sub node, and the interrupt-map pointed to the sub-node. Keeping everything in the base node maintains compatiblity. I will fix this for v5. > > It doesn't seem you are testing the binding against an actual DT. > Please do that. I need to fix the DTs I'm using for test :) Thanks for the feedback, Matthew Gerlach > > Rob > >> - #interrupt-cells = <1>; >> - bus-range = <0x0 0xFF>; >> - device_type = "pci"; >> - msi-parent = <&msi_to_gic_gen_0>; >> - #address-cells = <3>; >> - #size-cells = <2>; >> - interrupt-map-mask = <0 0 0 7>; >> - interrupt-map = <0 0 0 1 &pcie_0 1>, >> - <0 0 0 2 &pcie_0 2>, >> - <0 0 0 3 &pcie_0 3>, >> - <0 0 0 4 &pcie_0 4>; >> - ranges = <0x82000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x10000000 >> - 0x82000000 0x00000000 0x10000000 0xd0000000 0x00000000 0x10000000>; >> - }; >