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Tue, 23 Apr 2024 02:33:32 +0000 Received: from IA1PR11MB7200.namprd11.prod.outlook.com ([fe80::c990:5065:ed39:c165]) by IA1PR11MB7200.namprd11.prod.outlook.com ([fe80::c990:5065:ed39:c165%6]) with mapi id 15.20.7519.018; Tue, 23 Apr 2024 02:33:32 +0000 Message-ID: <9f23dd31-e7ef-4599-a13c-932ac288266b@intel.com> Date: Tue, 23 Apr 2024 10:33:23 +0800 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 1/6] PCI/RCEC: Introduce pcie_walk_rcec_all() To: Dan Williams , Terry Bowman , CC: , References: <20240313083602.239201-1-ming4.li@intel.com> <20240313083602.239201-2-ming4.li@intel.com> <661e00eb808e4_4d56129429@dwillia2-mobl3.amr.corp.intel.com.notmuch> <84eb39a1-60dd-40cb-8c7c-dfd9a988732d@amd.com> <6626ecb93f752_690a29483@dwillia2-xfh.jf.intel.com.notmuch> Content-Language: en-US From: "Li, Ming" Organization: Intel In-Reply-To: <6626ecb93f752_690a29483@dwillia2-xfh.jf.intel.com.notmuch> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SI2PR02CA0032.apcprd02.prod.outlook.com (2603:1096:4:195::12) To IA1PR11MB7200.namprd11.prod.outlook.com (2603:10b6:208:42f::11) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR11MB7200:EE_|CY8PR11MB7876:EE_ X-MS-Office365-Filtering-Correlation-Id: c9514bfa-54ab-4a1c-c77c-08dc633dc45d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Do you expect that implementation note to cause >>> any issues on platforms that do not follow that CXL spec behavior? >>> >>> My expectation is that it may just cause extra polling for errors, but >>> not cause any harm. >> >> AMD platforms in RCH/RCD mode consume protocol errors in the RCEC's AER driver. AMD >> platforms in VH mode consume protocol errors (including root port errors) in the >> root port's AER driver. The exception is the VH mode host with CXL1.1 endpoint and >> RCH downstream errors. CXL1.1 endpoint and RCH downstream errors in a VH host are >> consumed in the RCEC. > > I agree that's the most compatible path for existing software. > >> I don't believe these patchset changes would affect this behavior. But, I will need >> to test to confirm. > > As I wrote to Li Ming, I think any potential conflict can further be > limited by the fact that this extra scanning is limited to CXL.cachemem, > not typical PCI AER flows. Agree with Dan, but I think that software does not have a chance to know if the error is a CXL.cachemem error withour RDPAS(only knows it is a uncor_internal_error/cor_internal_error reported by RCEC), maybe we can limit this extra scanning for the RPs working on CXL mode?