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[35.204.239.8]) by smtp.gmail.com with ESMTPSA id t22-20020a1709063e5600b00a5209dc79c1sm7351624eji.146.2024.04.23.10.06.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Apr 2024 10:06:24 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Subject: [PATCH 0/7] USB31DRD phy support for Google Tensor gs101 (HS & SS) Date: Tue, 23 Apr 2024 18:06:02 +0100 Message-Id: <20240423-usb-phy-gs101-v1-0-ebdcb3ac174d@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-B4-Tracking: v=1; b=H4sIAHrqJ2YC/x3MMQqAMAxA0atIZgNNLQheRRy0pm2WKg2KIt7d4 viG/x9QLsIKQ/NA4VNUtlxBbQM+zTkyyloN1lhnnO3w0AX3dGNUMoTzEjqm3q7kHdRmLxzk+n/ j9L4fADc1WF8AAAA= To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , Marek Szyprowski , Sylwester Nawrocki , Alim Akhtar , Sam Protsenko Cc: Krzysztof Kozlowski , Tudor Ambarus , Will McVicker , Roy Luo , kernel-team@android.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.12.4 This patch series add support for the Exynos USB 3.1 DRD combo phy, as found in Exynos 9 SoCs like Google GS101. It supports USB SS, HS and DisplayPort, but DisplayPort is out of scope for this series. In terms of UTMI+, this is very similar to the existing Exynos850 support in this driver. The difference is that it supports both UTMI+ (HS) and PIPE3 (SS). Firstly, there are some preparatory patches to simplify addition, while the bulk of the changes is around the SS part. Signed-off-by: André Draszik --- André Draszik (7): dt-bindings: phy: samsung,usb3-drd-phy: add gs101 compatible phy: exynos5-usbdrd: use exynos_get_pmu_regmap_by_phandle() for PMU regs phy: exynos5-usbdrd: support isolating HS and SS ports independently phy: exynos5-usbdrd: set ref clk freq in exynos850_usbdrd_utmi_init() phy: exynos5-usbdrd: uniform order of register bit macros phy: exynos5-usbdrd: convert to clk_bulk for phy (register) access phy: exynos5-usbdrd: support Exynos USBDRD 3.1 combo phy (HS & SS) .../bindings/phy/samsung,usb3-drd-phy.yaml | 78 ++- drivers/phy/samsung/Kconfig | 1 - drivers/phy/samsung/phy-exynos5-usbdrd.c | 753 +++++++++++++++++++-- include/linux/soc/samsung/exynos-regs-pmu.h | 4 + 4 files changed, 757 insertions(+), 79 deletions(-) --- base-commit: a59668a9397e7245b26e9be85d23f242ff757ae8 change-id: 20240423-usb-phy-gs101-abf3e172d1c4 Best regards, -- André Draszik