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23 Apr 2024 20:42:28 -0700 Message-ID: Date: Wed, 24 Apr 2024 11:41:05 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Cc: baolu.lu@linux.intel.com, Kevin Tian , Yi Liu , Jacob Pan , Joerg Roedel , Will Deacon , Robin Murphy , linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/1] iommu/vt-d: Remove caching mode check before device TLB flush To: iommu@lists.linux.dev References: <20240415013835.9527-1-baolu.lu@linux.intel.com> Content-Language: en-US From: Baolu Lu In-Reply-To: <20240415013835.9527-1-baolu.lu@linux.intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 4/15/24 9:38 AM, Lu Baolu wrote: > The Caching Mode (CM) of the Intel IOMMU indicates if the hardware > implementation caches not-present or erroneous translation-structure > entries except for the first-stage translation. The caching mode is > irrelevant to the device TLB, therefore there is no need to check it > before a device TLB invalidation operation. > > Remove two caching mode checks before device TLB invalidation in the > driver. The removal of these checks doesn't change the driver's behavior > in critical map/unmap paths. Hence, there is no functionality or > performance impact, especially since commit <29b32839725f> ("iommu/vt-d: > Do not use flush-queue when caching-mode is on") has already disabled > flush-queue for caching mode. Therefore, caching mode will never call > intel_flush_iotlb_all(). > > Signed-off-by: Lu Baolu > Reviewed-by: Kevin Tian > --- > drivers/iommu/intel/iommu.c | 9 ++------- > 1 file changed, 2 insertions(+), 7 deletions(-) Patch has been queued for iommu/vt-d. Best regards, baolu