Received: by 2002:a89:48b:0:b0:1f5:f2ab:c469 with SMTP id a11csp208571lqd; Tue, 23 Apr 2024 22:35:42 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCXZ0rhkp5qsf6Ca1zWNeeUT0sAA+6IgjegELcrlhrdtTLaQ4dK+u/sz9F1c03gGvKTVwBcrpT0axgJvgorQBh2pNBZnaGaHnDtn5PfyZQ== X-Google-Smtp-Source: AGHT+IEnKq5sC8CeD/nM4mU46RnijPZkXJY8ViXxZAKh+lQnFw+8u00Y3dqrK3xMjRpjTkKak8+v X-Received: by 2002:a50:871e:0:b0:571:bed1:3a27 with SMTP id i30-20020a50871e000000b00571bed13a27mr803607edb.38.1713936942522; Tue, 23 Apr 2024 22:35:42 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1713936942; cv=pass; d=google.com; s=arc-20160816; b=jBFqLsXIgfIXcDBLmNPMIIL8Y3x3DdZMm4YI+o1+qKSkHHoaz/wdIntKg+maGxOPmd Bi943rKfM+Sddwhbdjbk+TjExxdISoAtaQEz1PRXaKSfxgGd8bQCOc4RrSzKisEg4d9O ly28szzHyca064eP6pSwwsbVz3lKzYyvppsBPl/76yD0ybeRP241ZuCdFIwD+YWiP0N4 L4dXDXKadDVXx8+8AFouA1KgtEFZXibK7vnRZRt7FgIvqe77kozMx9zy6qoX/j8rySzn QQNhENN3kollHbTMss+qB7VKHS4fwirrs6WWcDAY3SxSg0pMN/if4HtI/B3cNO8TbvbU /lNA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=1aCtw31Up0emr7Mp17tgdpk0IEerpp8FZcW5qjqdKjc=; fh=7zDsz27mBsgtoAIkbjOnm5GqQoRyvNqJW2tpYGq12lU=; b=BXC0KKPC4e+AdJM/AZ070/hY+AST5H9qA9z3YE0fAmNDGnx/FLmEhvZrcEtrU1l6jh 7aHjV4rNRZinnF9nnHoLiYDoUOZluIuCyiwu6DwTnpq8aDPB0V/suNCBKqY52l9CIWDB uWj2IJwmoH2+kF1rJaxQpO3f0iCYaIzbo4JCEcIe6oG7j2z9q5OD/0kW4x5KK+tiHInj xGOlqlZYoJbxDersp+8HsznLSJXsBWLbMPl89+JOHwUGCE+gnshU7TwsM6DzHa/g54xk sm8qMNSeGM9M7TCwNBLqN/Fz9BBJMwMULY/G2Bjlgq9KbDxM7io075QnQnQiTrr/NV0R Q2dA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=kBDyZ0Ml; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-156313-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-156313-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=microchip.com Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id u17-20020aa7d551000000b0056c4eeebe87si7837945edr.332.2024.04.23.22.35.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Apr 2024 22:35:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-156313-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=kBDyZ0Ml; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-156313-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-156313-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=microchip.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 42C431F23B0B for ; Wed, 24 Apr 2024 05:35:42 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id AE483156965; Wed, 24 Apr 2024 05:35:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="kBDyZ0Ml" Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E871156671 for ; Wed, 24 Apr 2024 05:35:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713936913; cv=none; b=IQ1+loV4y5iNl9JrA+ZASu01yVdH/1FaswsLdaIOrXe4ZCUK8ZwrcONQpeabZyVJhJW0gMO1LnYyHtTHKM+3EywNx81S8Q/PtPL02WAQvrwCy3EC4eVLGJeWanRraC377T/ZgwhiP+Wsc1ihEaI3VTwyYrFdb1e6TaxSxNOxZmg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713936913; c=relaxed/simple; bh=EJ7HICHgLilFrtLK8BajK1eVr4wt6O4I9e6krZgg5WE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=TuPz/c+Y/Ij2RJ0gEaBVptUPUBsdTWlxbv1ryQ7DAeOy9u4OhUW39DLPEEgXN0roBbs/whhrc3feNCKgPCb9MwK+XEp/Cu0WrPazI2eNymXhX+7EnIpVj7moLz48jbmwEHLOiiT/uFK6/fz2+OEnqUsuYRl0cisD1K7D3519f1Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=kBDyZ0Ml; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1713936912; x=1745472912; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EJ7HICHgLilFrtLK8BajK1eVr4wt6O4I9e6krZgg5WE=; b=kBDyZ0Mlm28T8L9F5DwJqGWyuqkX5HwKSovV9ou8iyUjtz6BHFvgVNx7 xRO4bkzI49TDN2f9Z6l+ZOkZZwnXjc0A2AFqfokea1vWfEZgQMUl024fc sU6jAeYbLo+0SJ0vgn3FmEG/idJrT+KMEeAJiXCoEo5twfX6knF9j1ufX 7728+88QIAOr0RTLaAq3z4sXIdzcosibHwe/EhqGbwoISGQHAbDYbSUa3 7B68dhbuoEVyLSA2Jpuv6AYvFiRgIbBPtpio3ttQS2PCD7dDiFK0tkTso 4rwiVzrgWvF9LKd7Vh3WkIE3uenA7EkyfBlMUzUnG2YnJ42/+EnVLwyI5 w==; X-CSE-ConnectionGUID: cS45O937TrSqQ6qvvirFaA== X-CSE-MsgGUID: pHqPswsEQ4y0P+i2vFp7IQ== X-IronPort-AV: E=Sophos;i="6.07,225,1708412400"; d="scan'208";a="22977482" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 23 Apr 2024 22:35:11 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 23 Apr 2024 22:34:50 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 23 Apr 2024 22:34:40 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , CC: , , , , , , , , "Manikandan Muralidharan" Subject: [PATCH RESEND v9 3/8] drm: atmel_hlcdc: replace regmap_read with regmap_read_poll_timeout Date: Wed, 24 Apr 2024 11:03:46 +0530 Message-ID: <20240424053351.589830-4-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240424053351.589830-1-manikandan.m@microchip.com> References: <20240424053351.589830-1-manikandan.m@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Replace regmap_read with regmap_read_poll_timeout to neatly handle retries Signed-off-by: Manikandan Muralidharan --- .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 44 +++++++++++-------- 1 file changed, 25 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c index cc5cf4c2faf7..b229692a27ca 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c @@ -203,19 +203,22 @@ static void atmel_hlcdc_crtc_atomic_disable(struct drm_crtc *c, pm_runtime_get_sync(dev->dev); regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_DISP); - while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) && - (status & ATMEL_HLCDC_DISP)) - cpu_relax(); + if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status, + !(status & ATMEL_HLCDC_DISP), + 10, 1000)) + dev_warn(dev->dev, "Atmel LCDC status register DISPSTS timeout\n"); regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_SYNC); - while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) && - (status & ATMEL_HLCDC_SYNC)) - cpu_relax(); + if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status, + !(status & ATMEL_HLCDC_SYNC), + 10, 1000)) + dev_warn(dev->dev, "Atmel LCDC status register LCDSTS timeout\n"); regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_PIXEL_CLK); - while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) && - (status & ATMEL_HLCDC_PIXEL_CLK)) - cpu_relax(); + if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status, + !(status & ATMEL_HLCDC_PIXEL_CLK), + 10, 1000)) + dev_warn(dev->dev, "Atmel LCDC status register CLKSTS timeout\n"); clk_disable_unprepare(crtc->dc->hlcdc->sys_clk); pinctrl_pm_select_sleep_state(dev->dev); @@ -241,20 +244,23 @@ static void atmel_hlcdc_crtc_atomic_enable(struct drm_crtc *c, clk_prepare_enable(crtc->dc->hlcdc->sys_clk); regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PIXEL_CLK); - while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) && - !(status & ATMEL_HLCDC_PIXEL_CLK)) - cpu_relax(); - + if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status, + status & ATMEL_HLCDC_PIXEL_CLK, + 10, 1000)) + dev_warn(dev->dev, "Atmel LCDC status register CLKSTS timeout\n"); regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_SYNC); - while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) && - !(status & ATMEL_HLCDC_SYNC)) - cpu_relax(); + if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status, + status & ATMEL_HLCDC_SYNC, + 10, 1000)) + dev_warn(dev->dev, "Atmel LCDC status register LCDSTS timeout\n"); regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_DISP); - while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) && - !(status & ATMEL_HLCDC_DISP)) - cpu_relax(); + if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status, + status & ATMEL_HLCDC_DISP, + 10, 1000)) + dev_warn(dev->dev, "Atmel LCDC status register DISPSTS timeout\n"); + pm_runtime_put_sync(dev->dev); -- 2.25.1