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24 Apr 2024 03:39:07 -0700 Message-ID: <1cb114be-9585-4f85-af9f-4bafb2d15d2a@intel.com> Date: Wed, 24 Apr 2024 13:39:02 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V5 00/12] perf/core: Add ability for an event to "pause" or "resume" AUX area tracing From: Adrian Hunter To: Peter Zijlstra Cc: Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , Andi Kleen , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org References: <20240208113127.22216-1-adrian.hunter@intel.com> <52f3abd2-4f75-4147-bc7b-c98960d9494b@intel.com> Content-Language: en-US Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki In-Reply-To: <52f3abd2-4f75-4147-bc7b-c98960d9494b@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11/04/24 15:02, Adrian Hunter wrote: > On 8/02/24 13:31, Adrian Hunter wrote: >> Hi >> >> Hardware traces, such as instruction traces, can produce a vast amount of >> trace data, so being able to reduce tracing to more specific circumstances >> can be useful. >> >> The ability to pause or resume tracing when another event happens, can do >> that. >> >> These patches add such a facilty and show how it would work for Intel >> Processor Trace. >> >> Maintainers of other AUX area tracing implementations are requested to >> consider if this is something they might employ and then whether or not >> the ABI would work for them. Note, thank you to James Clark (ARM) for >> evaluating the API for Coresight. Suzuki K Poulose (ARM) also responded >> positively to the RFC. >> >> Changes to perf tools are now (since V4) fleshed out. >> >> >> Changes in V5: >> >> perf/core: Add aux_pause, aux_resume, aux_start_paused >> Added James' Ack >> >> perf/x86/intel: Do not enable large PEBS for events with aux actions or aux sampling >> New patch >> >> perf tools >> Added Ian's Ack >> >> Changes in V4: >> >> perf/core: Add aux_pause, aux_resume, aux_start_paused >> Rename aux_output_cfg -> aux_action >> Reorder aux_action bits from: >> aux_pause, aux_resume, aux_start_paused >> to: >> aux_start_paused, aux_pause, aux_resume >> Fix aux_action bits __u64 -> __u32 >> >> coresight: Have a stab at support for pause / resume >> Dropped >> >> perf tools >> All new patches >> >> Changes in RFC V3: >> >> coresight: Have a stab at support for pause / resume >> 'mode' -> 'flags' so it at least compiles >> >> Changes in RFC V2: >> >> Use ->stop() / ->start() instead of ->pause_resume() >> Move aux_start_paused bit into aux_output_cfg >> Tighten up when Intel PT pause / resume is allowed >> Add an example of how it might work for CoreSight > > Any more comments? > Ping