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Wed, 24 Apr 2024 12:04:40 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 58A1015AD9D; Wed, 24 Apr 2024 12:04:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fNKbxxd8" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 69A7A1598E6; Wed, 24 Apr 2024 12:04:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713960272; cv=none; b=e+2uWNYxYsUZUmN0biNCfHAlTzy/FDEmct/ZLxOcW89SOGNLvZG/VyboFu+LiQnzzUzmlQgfgLUm3vazUuxM1S3SgGyEt07RN/f0KlPz9AOv4ZrPGYd9oxzcMH4O6MyCoNXCX5xV6k7AzyPhmeoYJjbw396bVNy+nciB0QlP8dk= ARC-Message-Signature:i=1; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="FnrRZ8qNOS4RlZZi" Content-Disposition: inline In-Reply-To: <1713939683-15328-3-git-send-email-hongxing.zhu@nxp.com> --FnrRZ8qNOS4RlZZi Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Apr 24, 2024 at 02:21:22PM +0800, Richard Zhu wrote: > Add i.MX8QM and i.MX8QXP HSIO SerDes PHY binding. > Introduce one HSIO configuration 'fsl,hsio-cfg', which need be set at > initialization according to board design. >=20 > Signed-off-by: Richard Zhu > --- > .../bindings/phy/fsl,imx8qm-hsio.yaml | 146 ++++++++++++++++++ > 1 file changed, 146 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8qm-hsio= =2Eyaml >=20 > diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8qm-hsio.yaml b= /Documentation/devicetree/bindings/phy/fsl,imx8qm-hsio.yaml > new file mode 100644 > index 000000000000..3e2824d1616c > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/fsl,imx8qm-hsio.yaml > @@ -0,0 +1,146 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/fsl,imx8qm-hsio.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale i.MX8QM SoC series HSIO SERDES PHY > + > +maintainers: > + - Richard Zhu > + > +properties: > + compatible: > + enum: > + - fsl,imx8qm-hsio > + - fsl,imx8qxp-hsio > + reg: > + minItems: 4 > + maxItems: 4 > + > + "#phy-cells": > + const: 3 > + description: > + The first defines the type of the PHY refer to the include phy.h. > + The second defines controller index. > + The third defines the lane mask of the lane ID, indicated which > + lane is used by the PHY. They are defined as HSIO_LAN* in > + dt-bindings/phy/phy-imx8-pcie.h > + > + reg-names: > + items: > + - const: reg > + - const: phy > + - const: ctrl > + - const: misc > + > + clocks: > + minItems: 5 > + maxItems: 14 > + > + clock-names: > + minItems: 5 > + maxItems: 14 > + > + fsl,hsio-cfg: > + description: Refer macro HSIO_CFG* include/dt-bindings/phy/phy-imx8-= pcie.h. > + $ref: /schemas/types.yaml#/definitions/uint32 > + > + fsl,refclk-pad-mode: > + description: > + Specifies the mode of the refclk pad used. It can be UNUSED(PHY > + refclock is derived from SoC internal source), INPUT(PHY refclock > + is provided externally via the refclk pad) or OUTPUT(PHY refclock > + is derived from SoC internal source and provided on the refclk pad= ). > + Refer include/dt-bindings/phy/phy-imx8-pcie.h for the constants > + to be used. > + $ref: /schemas/types.yaml#/definitions/uint32 > + default: IMX8_PCIE_REFCLK_PAD_OUTPUT My comments on this are still not addressed. Please go back and read my comments about this property on v1. --FnrRZ8qNOS4RlZZi Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZij1SwAKCRB4tDGHoIJi 0sB9AQCUlEN4Y+iM2h4RLoTcf+CyW85JNz9s592IJ1e0LbfxeAD/daenH3uvdPSY R6e+lzBzHxm/BsOJDs7cEViLd9gIzQA= =wBaM -----END PGP SIGNATURE----- --FnrRZ8qNOS4RlZZi--