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AJvYcCX3QpWDB7ZrEzKmd9XQEVgr8CHMgcL4GyhocQogapPN5C9BXtf1eh1HCcrIyHF+UmH98JLY91qQD43zQdtnQH3LsgqsZx4wOd281BcgxQdX84ABWyZ4nvx8QRaSLmYw321RBjI1h7tS7FwYPs77/PdMztZfWZyg3GaAgPo0JVDht/tgNvs= X-Gm-Message-State: AOJu0Yx/eZQ0YoQp1A/q3QAIIjb0lUXH/pOxkg06dKnGoB0I4tg6Wtbx c9QH07k3Oiz1OrKkkruttPLlahXugBgG+mxpm9bxS9uIfGQbR4Xf X-Received: by 2002:a17:90b:1d0e:b0:2a2:f284:5196 with SMTP id on14-20020a17090b1d0e00b002a2f2845196mr3224723pjb.45.1713984674335; Wed, 24 Apr 2024 11:51:14 -0700 (PDT) Received: from stbirv-lnx-1.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id u8-20020a170902e5c800b001e425d86ad9sm12268728plf.151.2024.04.24.11.51.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 11:51:13 -0700 (PDT) From: Doug Berger To: Linus Walleij , Bartosz Golaszewski Cc: Phil Elwell , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Doug Berger Subject: [PATCH 3/3] gpio: brcmstb: add support for gpio-ranges Date: Wed, 24 Apr 2024 11:50:39 -0700 Message-Id: <20240424185039.1707812-4-opendmb@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240424185039.1707812-1-opendmb@gmail.com> References: <20240424185039.1707812-1-opendmb@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit A pin controller device mapped with the gpio-ranges property will need implementations of the .request and .free members of the gpiochip. Signed-off-by: Doug Berger Tested-by: Phil Elwell --- drivers/gpio/gpio-brcmstb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c index 790cb278b72a..8dce78ea7139 100644 --- a/drivers/gpio/gpio-brcmstb.c +++ b/drivers/gpio/gpio-brcmstb.c @@ -694,6 +694,8 @@ static int brcmstb_gpio_probe(struct platform_device *pdev) /* not all ngpio lines are valid, will use bank width later */ gc->ngpio = MAX_GPIO_PER_BANK; gc->offset = bank->id * MAX_GPIO_PER_BANK; + gc->request = gpiochip_generic_request; + gc->free = gpiochip_generic_free; if (priv->parent_irq > 0) gc->to_irq = brcmstb_gpio_to_irq; -- 2.34.1