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From: Bjorn Andersson <quic_bjorande@quicinc.com>
Date: Wed, 24 Apr 2024 20:45:31 -0700
Subject: [PATCH] pinctrl: qcom: Fix behavior in abscense of open-drain
 support
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Message-ID: <20240424-tlmm-open-drain-v1-1-9dd2041f0532@quicinc.com>
To: Bjorn Andersson <andersson@kernel.org>,
        Linus Walleij
	<linus.walleij@linaro.org>,
        Brian Norris <computersforpeace@gmail.com>,
        Jaiganesh Narayanan <njaigane@codeaurora.org>
CC: Johan Hovold <johan@kernel.org>, Doug Anderson <dianders@chromium.org>,
        <linux-arm-msm@vger.kernel.org>, <linux-gpio@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>,
        Bjorn Andersson <quic_bjorande@quicinc.com>

When a GPIO is configured as OPEN_DRAIN gpiolib will in
gpiod_direction_output() attempt to configure the open-drain property of
the hardware and if this fails fall back to software emulation of this
state.

The TLMM block in most Qualcomm platform does not implement such
functionality, so this call would be expected to fail. But due to lack
of checks for this condition, the zero-initialized od_bit will cause
this request to silently corrupt the lowest bit in the config register
(which typically is part of the bias configuration) and happily continue
on.

Fix this by checking if the od_bit value is unspecified and if so fail
the request to avoid the unexpected state, and to make sure the software
fallback actually kicks in.

It is assumed for now that no implementation will come into existence
with BIT(0) being the open-drain bit, simply for convenience sake.

Fixes: 13355ca35cd1 ("pinctrl: qcom: ipq4019: add open drain support")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
 drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++
 drivers/pinctrl/qcom/pinctrl-msm.h | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index aeaf0d1958f5..329474dc21c0 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -313,6 +313,8 @@ static int msm_config_reg(struct msm_pinctrl *pctrl,
 			*mask |= BIT(g->i2c_pull_bit) >> *bit;
 		break;
 	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+		if (!g->od_bit)
+			return -EOPNOTSUPP;
 		*bit = g->od_bit;
 		*mask = 1;
 		break;
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h
index 63852ed70295..7b8cd1832112 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.h
+++ b/drivers/pinctrl/qcom/pinctrl-msm.h
@@ -51,7 +51,8 @@ struct pinctrl_pin_desc;
  * @mux_bit:              Offset in @ctl_reg for the pinmux function selection.
  * @pull_bit:             Offset in @ctl_reg for the bias configuration.
  * @drv_bit:              Offset in @ctl_reg for the drive strength configuration.
- * @od_bit:               Offset in @ctl_reg for controlling open drain.
+ * @od_bit:               Offset in @ctl_reg for controlling open drain. 0 if
+ *                        not supported by target.
  * @oe_bit:               Offset in @ctl_reg for controlling output enable.
  * @in_bit:               Offset in @io_reg for the input bit value.
  * @out_bit:              Offset in @io_reg for the output bit value.

---
base-commit: 5e4f84f18c4ee9b0ccdc19e39b7de41df21699dd
change-id: 20240424-tlmm-open-drain-8b014c1cfa1a

Best regards,
-- 
Bjorn Andersson <quic_bjorande@quicinc.com>