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AJvYcCU9LHQtAH0irZvZsl4Hhck2OesgJg0LcNyODhO9h1l3r/t4lvLLvFhjZtAnf7v1jslVIGJwIGP+LPG8qpCf/adxQubUKOcPeie+S/bH X-Gm-Message-State: AOJu0Yw31+iAdrn/oeiolEEVDEUrWNSc36JzARPE0nyaSBNeijH1k40Q s4+MYvpVLDvx9ogYe10u6SwNJ2IjrputF786CD8EQP3GIrSYqPcL/alDDmBZAhY5RCzZUP+i0hD YqiY64FQIKqvg3ZcCgfipQVngctiCzgET5Q+sJQ== X-Received: by 2002:a4a:987:0:b0:5ac:9efc:3b02 with SMTP id 129-20020a4a0987000000b005ac9efc3b02mr5567163ooa.8.1714040245481; Thu, 25 Apr 2024 03:17:25 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240423-usb-dwc3-gs101-v1-0-2f331f88203f@linaro.org> <20240423-usb-dwc3-gs101-v1-2-2f331f88203f@linaro.org> In-Reply-To: <20240423-usb-dwc3-gs101-v1-2-2f331f88203f@linaro.org> From: Peter Griffin Date: Thu, 25 Apr 2024 11:17:14 +0100 Message-ID: Subject: Re: [PATCH 2/2] usb: dwc3: exynos: add support for Google Tensor gs101 To: =?UTF-8?Q?Andr=C3=A9_Draszik?= Cc: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Thinh Nguyen , Krzysztof Kozlowski , Tudor Ambarus , Will McVicker , Roy Luo , kernel-team@android.com, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 23 Apr 2024 at 21:19, Andr=C3=A9 Draszik = wrote: > > The Exynos-based Google Tensor gs101 SoC has a DWC3 compatible USB > controller and can reuse the existing Exynos glue. Add the > google,gs101-dwusb3 compatible and associated driver data. Four clocks > are required for USB for this SoC: > * bus clock > * suspend clock > * Link interface AXI clock > * Link interface APB clock > > Signed-off-by: Andr=C3=A9 Draszik > --- Reviewed-by: Peter Griffin regards, Peter