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Thu, 25 Apr 2024 10:31:09 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 25 Apr 2024 03:31:04 -0700 Date: Thu, 25 Apr 2024 16:00:58 +0530 From: Varadarajan Narayanan To: Konrad Dybcio CC: , , , , , , , , , , , , , Subject: Re: [PATCH v9 4/6] clk: qcom: common: Add interconnect clocks support Message-ID: References: <20240418092305.2337429-1-quic_varada@quicinc.com> <20240418092305.2337429-5-quic_varada@quicinc.com> <5e2682bc-88cf-4aca-9e7d-205f4cfca989@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <5e2682bc-88cf-4aca-9e7d-205f4cfca989@linaro.org> X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: qAFLsJ1UusYmjjunlgfeFTOBUbJZJmHU X-Proofpoint-ORIG-GUID: qAFLsJ1UusYmjjunlgfeFTOBUbJZJmHU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-04-25_10,2024-04-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 malwarescore=0 suspectscore=0 priorityscore=1501 mlxlogscore=633 bulkscore=0 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2404250076 On Tue, Apr 23, 2024 at 01:05:16AM +0200, Konrad Dybcio wrote: > > > On 4/18/24 11:23, Varadarajan Narayanan wrote: > > Unlike MSM platforms that manage NoC related clocks and scaling > > from RPM, IPQ SoCs dont involve RPM in managing NoC related > > clocks and there is no NoC scaling. > > > > However, there is a requirement to enable some NoC interface > > clocks for accessing the peripheral controllers present on > > these NoCs. Though exposing these as normal clocks would work, > > having a minimalistic interconnect driver to handle these clocks > > would make it consistent with other Qualcomm platforms resulting > > in common code paths. This is similar to msm8996-cbf's usage of > > icc-clk framework. > > > > Signed-off-by: Varadarajan Narayanan > > --- > > One more thing that we don't seem to have squared out is how to handle > .sync_state. We can just jerryrig icc_sync_state in here, but I'm not > sure how that goes with some floating ideas of clk_sync_state that have > been tried in the past Ok. Will add that and post a new version. Thanks Varada