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Date: Thu, 25 Apr 2024 11:41:56 +0100
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Subject: Re: [PATCH v3 4/5] arm64: Add initial support for Blaize BLZP1600 CB2
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        "robh@kernel.org" <robh@kernel.org>,
        "krzysztof.kozlowski+dt@linaro.org" <krzysztof.kozlowski+dt@linaro.org>,
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        "will@kernel.org" <will@kernel.org>, "arnd@arndb.de" <arnd@arndb.de>,
        "olof@lixom.net" <olof@lixom.net>, Neil Jones <neil.jones@blaize.com>,
        Matt Redfearn <matthew.redfearn@blaize.com>,
        James Cowgill <james.cowgill@blaize.com>,
        "heiko.stuebner@cherry.de" <heiko.stuebner@cherry.de>,
        "shawnguo@kernel.org" <shawnguo@kernel.org>,
        "macromorgan@hotmail.com" <macromorgan@hotmail.com>,
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        "m.szyprowski@samsung.com" <m.szyprowski@samsung.com>,
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Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
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References: <20240425091403.17483-1-nikolaos.pasaloukos@blaize.com>
 <20240425091403.17483-5-nikolaos.pasaloukos@blaize.com>
 <9b24ffdf-1247-4164-9841-6063106d76ea@linaro.org>
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From: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
In-Reply-To: <9b24ffdf-1247-4164-9841-6063106d76ea@linaro.org>
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 =?utf-8?B?VHFaUGVDczZJZ3ZuN216Y1pLU3NHSm1wZVVhRmwzR3I4QndQQmZlQzlsdXY2?=
 =?utf-8?B?NEdHMEJyL3JUYVNhTHNiRkRSdjhZNHdLMitQRC96M3B5NUpaWFFLaHpBcjRY?=
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 =?utf-8?B?OEI4OVhZY2tRWG0rRlh0d1AyeVkyTnNmMkR6Ymg5eTZTL0Z0azlIaUpPWldn?=
 =?utf-8?B?UTdDNjNyZ2JSeDl1Vk9xWXoycHpCRUxEQm5rTWc0Q0hvNFM5UUllV1N1bC8y?=
 =?utf-8?B?VCtzV1pkTHNpUkR3RFhqVG9zMkZybFB5ZjdWNDFxVm1WeHE2Um9lVEhTZUla?=
 =?utf-8?B?WGFyZnE5N25Ta2p6aDl5Ull4a0pHamtuYnR5VUIrbmhvU01LZDdwcGlPeGFj?=
 =?utf-8?B?WnJ6QnppTDF0eVFRSjJQOFFxb2RzL1poR1ZOU3hSb1E2NDFld2h2VGMzN1Q3?=
 =?utf-8?B?YkR1Y3RLaC9weFg4aDdjd0hTQmJMd3RaZ3VPYmhlcjBEQmxqQVRsdWlTWjdT?=
 =?utf-8?B?MTNxdEsxeUNYMTIzTFdOM1VxejVkQktlZVpUdzg2TGJVNlpOMVhxRUx2ajVC?=
 =?utf-8?B?US8zRWNzZ0JZZFgxa1N1dlYveGZoaFhVWFNiQ0hORG1lSk14ZVJjdXFuMk9L?=
 =?utf-8?B?MTJxN1NoMGdLZE5FV09yMHJIc1U5Rjl2K3NaOExJVVRGRTRZT0lVQ05RcXZk?=
 =?utf-8?B?UkFTV1lTQUovVUx0NjU5OEZTa3dHM1Zpa1gvUlRpWnBMRHZldC9SME4zL2NU?=
 =?utf-8?B?U084RUxxWGcvZThzUjBQSVNjeXNFcVpRUU93ZFZjcHRrUnRsSCtKOFY3S3hZ?=
 =?utf-8?B?ekVodDNrdlRzL1JaOWp2bkRWUVN1VkJEaUczNEFSSVQzQ1dLS2JWdGMxZ3FV?=
 =?utf-8?B?UHlSZEtmMGlORFlpdnZKSVNWaDBzRDVqc1BucFl1aSs4OW11WW43bFE5UE5F?=
 =?utf-8?B?R0dJV1ZadTlsbmt1UDVDc1JaWm1CQWtXNGZFY2NzUkNxU2ZxSDhTbTNPb2Rx?=
 =?utf-8?B?bkw0WmpJOFo4QXhzdHNvU2hOZ0tMUjRBVlF1cXZyd3hSNTVIbGZkVlNZdEFK?=
 =?utf-8?B?RHRlQkVUVzhDNXY0N1JXT0xVR0IyL3RIMVkvMGtnam9xbU9SUTlQWk9CZzAy?=
 =?utf-8?B?eUQ3YVJJZHprZmZwSTBOK0NXRVF2bXVYemlHWncvQytkTi9kQVo3N2o3dXBs?=
 =?utf-8?B?Q0lEdi9WMXdKa2ZJZ0x4dGRJeDdPQ0pYUHJiQUdMNUxPZ0c0Nm9kRGJWaGRh?=
 =?utf-8?B?azZoRmt4WTdDZDRqVVVNUGY1WDkvblRsVnJLZmQwTmZqaHhVVnEwZFJQLzVZ?=
 =?utf-8?B?cStIQmR3ekVORGVpbEtqbjk2YkFwSEUvMm13NTdvUGwxSm5NRERUWFdFZlV0?=
 =?utf-8?B?Ni9Rcmc2bG5BTTlQNTNTVDdPc2ZFMkJQcUVERjU2ZDRnS3pFakZFOVR4RW00?=
 =?utf-8?B?WElWVCthdU1NM2NkbFRuVkN6eTZyTkZEbWoveXI4RitlbjBZb0h4VEZBVWlJ?=
 =?utf-8?B?YW1NdURIK2ZKcmxYZWVCWHlFUzFscTBxZGpSY1VvV2lFUkRubWxTaVJJV01D?=
 =?utf-8?B?TFhDK0xkdjBOOHh6eWRDU1VybHhYTUdaeDk0L09OS2RxU01yUE0zOXFZVDN6?=
 =?utf-8?B?WThFWTBKcUcrWDJmU1hxK1VGR2xjWW1wVE1iWnIxcjRmUG5DS1FreVlqSlJL?=
 =?utf-8?B?QjAyWEZ6Q3R0alZQd2hZL3dCUnhQYzZWRkQySEd6QWVUSmxnem8wT0pXREJI?=
 =?utf-8?B?YStlNVA4OUJXRVBLT1lpUjRNeEdZS2FxOG5qcjByWEREQVNSeUlvekkvSUNO?=
 =?utf-8?B?TUk0SnptbmRRK2R5MWZVaXdrRzh1K0FNOHlwR0xSVU5tMURxN1o1c1lDK3gr?=
 =?utf-8?B?SzRBSzJFbXJvTnlQQWZ0U2dKMmNkZ0tQUVgyRUt0eGd6ZThBdG04WmIwZzNr?=
 =?utf-8?B?SnhLNW9XazdZS3JZa2cwbktoTHZFRGtsVXlyMk9RbGFZcHI3YTErTWw4Z2xq?=
 =?utf-8?B?Ry9kKzVjajFSNWVRaytDZHRKaS9IRk92aE8yTVZVUlpZckpwZWJOUEYwbU93?=
 =?utf-8?B?VjA4N3NjQ3VzUnQwRVVuTU1RRDBRQzdUZ0xIWExnZDQrOUs0RUtVS212TnNW?=
 =?utf-8?Q?1J/xfIqFKyL5o/5UxpSAaM4on/6Ty/v25o8QsFx7lg=3D?=
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On 25/04/2024 10:21, Krzysztof Kozlowski wrote:
> On 25/04/2024 11:15, Niko Pasaloukos wrote:
>> Adds support for the Blaize CB2 development board based on
>> BLZP1600 SoC. This consists of a Carrier-Board-2 and a SoM.
> 
> Subject: missing dts prefix.
> 
> 
> ...
> 
>> +
>> +/ {
>> +	interrupt-parent = <&gic>;
>> +	#address-cells = <2>;
>> +	#size-cells = <1>;
>> +
>> +	cpus {
>> +		#address-cells = <2>;
>> +		#size-cells = <0>;
>> +
>> +		cpu0: cpu@0 {
>> +			compatible = "arm,cortex-a53";
>> +			device_type = "cpu";
>> +			enable-method = "psci";
>> +			reg = <0x0 0x0>;
>> +			next-level-cache = <&l2>;
>> +		};
>> +
>> +		cpu1: cpu@1 {
>> +			compatible = "arm,cortex-a53";
>> +			device_type = "cpu";
>> +			enable-method = "psci";
>> +			reg = <0x0 0x1>;
>> +			next-level-cache = <&l2>;
>> +		};
>> +
>> +		l2: l2-cache0 {
>> +			compatible = "cache";
>> +			cache-level = <2>;
>> +			cache-unified;
>> +		};
>> +	};
>> +
>> +	timer {
>> +		compatible = "arm,armv8-timer";
>> +		interrupts = /* Physical Secure PPI */
>> +			     <GIC_PPI 13 (GIC_CPU_MASK_RAW(0x3) |
>> +					  IRQ_TYPE_LEVEL_LOW)>,
>> +			     /* Physical Non-Secure PPI */
>> +			     <GIC_PPI 14 (GIC_CPU_MASK_RAW(0x3) |
>> +					  IRQ_TYPE_LEVEL_LOW)>,
>> +			     /* Hypervisor PPI */
>> +			     <GIC_PPI 10 (GIC_CPU_MASK_RAW(0x3) |
>> +					  IRQ_TYPE_LEVEL_LOW)>,
>> +			     /* Virtual PPI */
>> +			     <GIC_PPI 11 (GIC_CPU_MASK_RAW(0x3) |
>> +					  IRQ_TYPE_LEVEL_LOW)>;
>> +	};
>> +
>> +	psci {
>> +		compatible = "arm,psci-1.0", "arm,psci-0.2";
>> +		method = "smc";
>> +	};
>> +
>> +	pmu {
> 
> Nodes in top-level look randomly ordered. Any reason why not using DTS
> coding style in this regard?
> 
>> +		compatible = "arm,cortex-a53-pmu";
>> +		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
>> +			     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
>> +		interrupt-affinity = <&cpu0>, <&cpu1>;
>> +	};
>> +
>> +	sram@0 {
>> +		/*
>> +		 * On BLZP1600 there is no general purpose (non-secure) SRAM.
>> +		 * A small DDR memory space has been reserved for general use.
>> +		 */
>> +		compatible = "mmio-sram";
>> +		reg = <0x0 0x00000000 0x00001000>;
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>> +		ranges = <0 0x0 0x00000000 0x1000>;
> 
> ranges follow reg
> 
>> +
>> +		/* SCMI reserved buffer space on DDR space */
>> +		scmi0_shm: scmi-sram@800 {
>> +			compatible = "arm,scmi-shmem";
>> +			reg = <0x800 0x80>;
>> +		};
>> +	};
>> +
>> +	firmware {
>> +		scmi {
>> +			compatible = "arm,scmi-smc";
>> +			arm,smc-id = <0x82002000>;
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			shmem = <&scmi0_shm>;
>> +
>> +			scmi_clk: protocol@14 {
>> +				reg = <0x14>;
>> +				#clock-cells = <1>;
>> +			};
>> +
>> +			scmi_rst: protocol@16 {
>> +				reg = <0x16>;
>> +				#reset-cells = <1>;
>> +			};
>> +		};
>> +	};
>> +
>> +	soc {
> 
> This does not cause dtbs_check W=1 warnings? Surprising a bit... This
> should cause big fat warning, so I have doubts patchset was tested.
> 
> 
> Best regards,
> Krzysztof
> 

No it doesn't cause any warnings. I did:
make arch=arm64 dt_binding_check
make arch=arm64 dtbs_check W=1
I don't get any warnings. Could you please let me know what kind of
warning I should get? Am I doing something wrong and I don't get
the warning?

Kind regards,
Niko