Received: by 2002:a89:48b:0:b0:1f5:f2ab:c469 with SMTP id a11csp1263642lqd; Thu, 25 Apr 2024 10:07:08 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCU3+CjZh0kPOBd/y4wGSG6+AHxXPX84blGMfQNF7dFcnaQ/Uzuid8hHxNW2EctjYa7oAwT7rByu89i44jt5S3XlQZdKoFxJ4wrzAEcarg== X-Google-Smtp-Source: AGHT+IFXil7en1FMMCzIUf11qZIYlGZH/4u5v7jHu54emP3tNlEcj7E+q23Q/JiXIzmMmBtg0LDT X-Received: by 2002:a05:620a:40c3:b0:790:9929:3324 with SMTP id g3-20020a05620a40c300b0079099293324mr314308qko.11.1714064828281; Thu, 25 Apr 2024 10:07:08 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1714064828; cv=pass; d=google.com; s=arc-20160816; b=yA72Kmjq+ImKMmgPBXKfDRUkmgzqVfCyrsYJryz2N8JoHYZ755uzLaVihWTIij5Fu6 CbuaphgwG2GTuVT3RVe0u67hBuDgI5lY49Rn8KQZ569GmS1jGGSHMa8Vw5QNHCuW3NWz 3/EUMsICu3MWyFBrGOaWJ42pBI+M6fCIL/n0MRjA4HFFzb0makg5tRa7eKEduK69Jx+s eYx2knf/W/6QTgddnWjOwrnq1wm2eS2RHesj8Re7PSfzsAItZgkPAS/sG2M44k2N0hCK BseHavsWJYlW/405ZPuztyh8nmWL5EURlkwXAvKKOhoiBH+75f1NoWYbYG6MWMCr9t6O KyZA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-subscribe:list-id:precedence:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=b7JIib4/QjeTj5PGK7ML2rQiSPT/EYRhdhXBRJnAyx8=; fh=eHqJfzqMTwYd5GnGc2yf8j7JPTEUe7TwPPTEQdXh+fk=; b=cUGIKoRKAfztdCBfnSWK+GRkbHD1hpnvI3VhwIEaUF0DHV0ANp/Gaa21Tetmytn2XC RsYgf/VgUJ75S78QQ+gOvfiXllLQgda1IG1cCSGFqLlFb3d7xl+uhH7HstdzTHDWjlAH wO2J+dWWvfxRoLlJY502Y66l02igtZykZtdCzc0I0UuvZA+FiPl1R0+8Xd1vAoPkpVXJ vHvyxDJ5JtrIf8SoY3MArFwVweUIqFqKSrP1+Jh6aBIuUHmFCJNydZy8Cckj2hNp3QbI vgolk7KhL5WABvrtYRhML+KGETt4ThvR3k+97PRsw0spxlENKq8B7cT7ZD+GwGzJGWvW W6Ew==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="Jy775qv/"; arc=pass (i=1 dkim=pass dkdomain=intel.com dmarc=pass fromdomain=linux.intel.com); spf=pass (google.com: domain of linux-kernel+bounces-158941-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-158941-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [2604:1380:45d1:ec00::1]) by mx.google.com with ESMTPS id z8-20020a05620a260800b0078f105216d0si20570973qko.417.2024.04.25.10.07.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Apr 2024 10:07:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-158941-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="Jy775qv/"; arc=pass (i=1 dkim=pass dkdomain=intel.com dmarc=pass fromdomain=linux.intel.com); spf=pass (google.com: domain of linux-kernel+bounces-158941-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-158941-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id AB7081C2302B for ; Thu, 25 Apr 2024 17:07:05 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7320B14EC44; Thu, 25 Apr 2024 17:06:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Jy775qv/" Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D14E14D707; Thu, 25 Apr 2024 17:06:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714064798; cv=none; b=WZUmZf+Y8mS9kQCZnX2xwU4uQu/u5Vk0tC8qACEsyL5kvOQPe0IvBZ64t9B9/5YygD7+2I/kGgZ23/RxQEK6F9FgQKCwStVY+4WVfYVLq9QCzeXkePX963HHEMrXraLlcjkT5POz2hYGND8fN6rIhi/kzvBgc26W3myShl5bDMk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714064798; c=relaxed/simple; bh=pAfVKWKU49Dwg4CmC+F0pJ1yRNXxR8Fmblsw2vpiToo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=IeoZVdlkROX6lsqXBjwkNiCizuj2eWFucrk+VzQJrSkGbLwr9GAmV7NLUqut6z674EDFjkHQeejsP7Vx7SfA3hBYFLH4bixZpTAquWPVig9SJKb9zTqjNUhzV57EG5iY6crTRUJORSfyFpWOOc7xTEgpg9GZW/fGenpZgi9Rak4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Jy775qv/; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714064797; x=1745600797; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=pAfVKWKU49Dwg4CmC+F0pJ1yRNXxR8Fmblsw2vpiToo=; b=Jy775qv/qNXZR6FbwX7KJmDNwrdXHoo8DEjzeeNaqWizNflaR6+CgEJF goAfgKCVoJV2jYX0ODOlDumCkoihzWfmk25MjN/MvsMvKpCLflPAgirqr IuHBE/9o0X39v35XZE/SUYauDzVoJbsogSX1XB5jOukgNRzg3XKZeQA7b 97DTtFuIa4TOebs4uOxYu+FG9x5g7RlJuktukG4UoJaQxjlmUpOGXWVWD MeKy9HNTdPolv+6rVwU/ox+xTDHqlP8cMRqrF7d3kHpqYvux/VzarrHwE 8FhBo5tvvLGU6K2uyNgSOrWiDZlU+q5y9nxTrgfQdi9dlDxC6/mucUxGk w==; X-CSE-ConnectionGUID: qx/32lGoT0mDMJ7s4IXqyQ== X-CSE-MsgGUID: QFsICatmSBa9pIy9UUsW7A== X-IronPort-AV: E=McAfee;i="6600,9927,11055"; a="27225307" X-IronPort-AV: E=Sophos;i="6.07,230,1708416000"; d="scan'208";a="27225307" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2024 10:06:36 -0700 X-CSE-ConnectionGUID: 1FFUenbyQxav3CT1uCoNFw== X-CSE-MsgGUID: By4Xz9NSRkGw1rS2nLcZzg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,230,1708416000"; d="scan'208";a="25548560" Received: from ranerica-svr.sc.intel.com ([172.25.110.23]) by orviesa006.jf.intel.com with ESMTP; 25 Apr 2024 10:06:35 -0700 From: Ricardo Neri To: "Rafael J. Wysocki" , Zhang Rui , Jean Delvare , Guenter Roeck Cc: Srinivas Pandruvada , Lukasz Luba , Daniel Lezcano , linux-pm@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, Ricardo Neri Subject: [PATCH v2 2/3] thermal: intel: intel_tcc_cooling: Use a model-specific bitmask for TCC offset Date: Thu, 25 Apr 2024 10:13:10 -0700 Message-Id: <20240425171311.19519-3-ricardo.neri-calderon@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240425171311.19519-1-ricardo.neri-calderon@linux.intel.com> References: <20240425171311.19519-1-ricardo.neri-calderon@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The TCC offset field in the register MSR_TEMPERATURE_TARGET is not architectural. The TCC library provides a model-specific bitmask. Use it to determine the maximum TCC offset. Suggested-by: Zhang Rui Signed-off-by: Ricardo Neri --- Cc: Daniel Lezcano Cc: Lukasz Luba Cc: Srinivas Pandruvada Cc: linux-hwmon@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org # v6.7+ --- Changes since v1: * Used renamed function intel_tcc_get_offset_mask(). --- drivers/thermal/intel/intel_tcc_cooling.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/intel/intel_tcc_cooling.c b/drivers/thermal/intel/intel_tcc_cooling.c index 6c392147e6d1..5bfc2b515c78 100644 --- a/drivers/thermal/intel/intel_tcc_cooling.c +++ b/drivers/thermal/intel/intel_tcc_cooling.c @@ -20,7 +20,7 @@ static struct thermal_cooling_device *tcc_cdev; static int tcc_get_max_state(struct thermal_cooling_device *cdev, unsigned long *state) { - *state = 0x3f; + *state = intel_tcc_get_offset_mask(); return 0; } -- 2.34.1