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From: Andrii Nakryiko <andrii.nakryiko@gmail.com>
Date: Thu, 25 Apr 2024 11:09:22 -0700
Message-ID: <CAEf4BzZe-rtewAvDeNwqoud+x+fTraiLM1mzdvae_5yNrWsWyg@mail.gmail.com>
Subject: Re: [PATCH bpf-next v2 2/2] bpf, arm64: inline bpf_get_smp_processor_id()
 helper
To: Puranjay Mohan <puranjay@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, 
	Alexei Starovoitov <ast@kernel.org>, Daniel Borkmann <daniel@iogearbox.net>, 
	Andrii Nakryiko <andrii@kernel.org>, Martin KaFai Lau <martin.lau@linux.dev>, 
	Eduard Zingerman <eddyz87@gmail.com>, Song Liu <song@kernel.org>, 
	Yonghong Song <yonghong.song@linux.dev>, John Fastabend <john.fastabend@gmail.com>, 
	KP Singh <kpsingh@kernel.org>, Stanislav Fomichev <sdf@google.com>, Hao Luo <haoluo@google.com>, 
	Jiri Olsa <jolsa@kernel.org>, Zi Shen Lim <zlim.lnx@gmail.com>, Xu Kuohai <xukuohai@huawei.com>, 
	Florent Revest <revest@chromium.org>, linux-arm-kernel@lists.infradead.org, 
	linux-kernel@vger.kernel.org, bpf@vger.kernel.org
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On Thu, Apr 25, 2024 at 3:14=E2=80=AFAM Puranjay Mohan <puranjay@kernel.org=
> wrote:
>
> Andrii Nakryiko <andrii.nakryiko@gmail.com> writes:
>
> > On Wed, Apr 24, 2024 at 10:36=E2=80=AFAM Puranjay Mohan <puranjay@kerne=
l.org> wrote:
> >>
> >> As ARM64 JIT now implements BPF_MOV64_PERCPU_REG instruction, inline
> >> bpf_get_smp_processor_id().
> >>
> >> ARM64 uses the per-cpu variable cpu_number to store the cpu id.
> >>
> >> Here is how the BPF and ARM64 JITed assembly changes after this commit=
:
> >>
> >>                                          BPF
> >>                                         =3D=3D=3D=3D=3D
> >>               BEFORE                                       AFTER
> >>              --------                                     -------
> >>
> >> int cpu =3D bpf_get_smp_processor_id();           int cpu =3D bpf_get_=
smp_processor_id();
> >> (85) call bpf_get_smp_processor_id#229032       (18) r0 =3D 0xffff8000=
82072008
> >>                                                 (bf) r0 =3D r0
> >
> > nit: hmm, you are probably using a bit outdated bpftool, it should be
> > emitted as:
> >
> > (bf) r0 =3D &(void __percpu *)(r0)
>
> Yes, I was using the bpftool shipped with the distro. I tried it again
> with the latest bpftool and it emitted this as expected.

Cool, would be nice to update the commit message with the right syntax
for next revision, thanks!

>
> >
> >>                                                 (61) r0 =3D *(u32 *)(r=
0 +0)
> >>
> >>                                       ARM64 JIT
> >>                                      =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> >>
> >>               BEFORE                                       AFTER
> >>              --------                                     -------
> >>
> >> int cpu =3D bpf_get_smp_processor_id();      int cpu =3D bpf_get_smp_p=
rocessor_id();
> >> mov     x10, #0xfffffffffffff4d0           mov     x7, #0xffff8000ffff=
ffff
> >> movk    x10, #0x802b, lsl #16              movk    x7, #0x8207, lsl #1=
6
> >> movk    x10, #0x8000, lsl #32              movk    x7, #0x2008
> >> blr     x10                                mrs     x10, tpidr_el1
> >> add     x7, x0, #0x0                       add     x7, x7, x10
> >>                                            ldr     w7, [x7]
> >>
> >> Performance improvement using benchmark[1]
> >>
> >>              BEFORE                                       AFTER
> >>             --------                                     -------
> >>
> >> glob-arr-inc   :   23.817 =C2=B1 0.019M/s      glob-arr-inc   :   24.6=
31 =C2=B1 0.027M/s
> >> arr-inc        :   23.253 =C2=B1 0.019M/s      arr-inc        :   23.7=
42 =C2=B1 0.023M/s
> >> hash-inc       :   12.258 =C2=B1 0.010M/s      hash-inc       :   12.6=
25 =C2=B1 0.004M/s
> >>
> >> [1] https://github.com/anakryiko/linux/commit/8dec900975ef
> >>
> >> Signed-off-by: Puranjay Mohan <puranjay@kernel.org>
> >> ---
> >>  kernel/bpf/verifier.c | 11 ++++++++++-
> >>  1 file changed, 10 insertions(+), 1 deletion(-)
> >>
> >
> > Besides the nits, lgtm.
> >
> > Acked-by: Andrii Nakryiko <andrii@kernel.org>
> >
> >> diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c
> >> index 9715c88cc025..3373be261889 100644
> >> --- a/kernel/bpf/verifier.c
> >> +++ b/kernel/bpf/verifier.c
> >> @@ -20205,7 +20205,7 @@ static int do_misc_fixups(struct bpf_verifier_=
env *env)
> >>                         goto next_insn;
> >>                 }
> >>
> >> -#ifdef CONFIG_X86_64
> >> +#if defined(CONFIG_X86_64) || defined(CONFIG_ARM64)
> >
> > I think you can drop this, we are protected by
> > bpf_jit_supports_percpu_insn() check and newly added inner #if/#elif
> > checks?
>
> If I remove this and later add support of percpu_insn on RISCV without
> inlining bpf_get_smp_processor_id() then it will cause problems here
> right? because then the last 5-6 lines inside this if(){} will be
> executed for RISCV.

Just add

#else
return -EFAULT;
#endif

?

I'm trying to avoid this duplication of the defined(CONFIG_xxx) checks
for supported architectures.

>
> >
> >>                 /* Implement bpf_get_smp_processor_id() inline. */
> >>                 if (insn->imm =3D=3D BPF_FUNC_get_smp_processor_id &&
> >>                     prog->jit_requested && bpf_jit_supports_percpu_ins=
n()) {
> >> @@ -20214,11 +20214,20 @@ static int do_misc_fixups(struct bpf_verifie=
r_env *env)
> >>                          * changed in some incompatible and hard to su=
pport
> >>                          * way, it's fine to back out this inlining lo=
gic
> >>                          */
> >> +#if defined(CONFIG_X86_64)
> >>                         insn_buf[0] =3D BPF_MOV32_IMM(BPF_REG_0, (u32)=
(unsigned long)&pcpu_hot.cpu_number);
> >>                         insn_buf[1] =3D BPF_MOV64_PERCPU_REG(BPF_REG_0=
, BPF_REG_0);
> >>                         insn_buf[2] =3D BPF_LDX_MEM(BPF_W, BPF_REG_0, =
BPF_REG_0, 0);
> >>                         cnt =3D 3;
> >> +#elif defined(CONFIG_ARM64)
> >> +                       struct bpf_insn cpu_number_addr[2] =3D { BPF_L=
D_IMM64(BPF_REG_0, (u64)&cpu_number) };
> >>
> >
> > this &cpu_number offset is not guaranteed to be within 4GB on arm64?
>
> Unfortunately, the per-cpu section is not placed in the first 4GB and
> therefore the per-cpu pointers are not 32-bit on ARM64.

I see. It might make sense to turn x86-64 code into using MOV64_IMM as
well to keep more of the logic common. Then it will be just the
difference of an offset that's loaded. Give it a try?

>
> >
> >> +                       insn_buf[0] =3D cpu_number_addr[0];
> >> +                       insn_buf[1] =3D cpu_number_addr[1];
> >> +                       insn_buf[2] =3D BPF_MOV64_PERCPU_REG(BPF_REG_0=
, BPF_REG_0);
> >> +                       insn_buf[3] =3D BPF_LDX_MEM(BPF_W, BPF_REG_0, =
BPF_REG_0, 0);
> >> +                       cnt =3D 4;
> >> +#endif
> >>                         new_prog =3D bpf_patch_insn_data(env, i + delt=
a, insn_buf, cnt);
> >>                         if (!new_prog)
> >>                                 return -ENOMEM;
> >> --
> >> 2.40.1
> >>