Received-SPF: pass (google.com: domain of linux-kernel+bounces-159086-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223;
Precedence: bulk
MIME-Version: 1.0
References: <CAJZ5v0iUUmMUo86vBzYJjL4NjoFzpDwD1+c292aP+T++PLv6vQ@mail.gmail.com>
 <CAHk-=wj8J78-12QfAoKaLdRi2g1=_U7sv02POShjotcJ6t4nzw@mail.gmail.com> <CAHk-=wj52PUZ0xtoLs79B9uar6h7FVaKC0gbD-a_wZxDjH2ViQ@mail.gmail.com>
In-Reply-To: <CAHk-=wj52PUZ0xtoLs79B9uar6h7FVaKC0gbD-a_wZxDjH2ViQ@mail.gmail.com>
From: "Rafael J. Wysocki" <rafael@kernel.org>
Date: Thu, 25 Apr 2024 21:45:24 +0200
Message-ID: <CAJZ5v0j7Do94XvUQrLgA_mFFyxdeb2RO08JwUzL0_QErOOrrAQ@mail.gmail.com>
Subject: Re: [GIT PULL] ACPI fixes for v6.9-rc6
To: Linus Torvalds <torvalds@linux-foundation.org>, 
	Jarred White <jarredwhite@linux.microsoft.com>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>, ACPI Devel Maling List <linux-acpi@vger.kernel.org>, 
	Linux PM <linux-pm@vger.kernel.org>, 
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, 
	Easwar Hariharan <eahariha@linux.microsoft.com>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable

On Thu, Apr 25, 2024 at 9:18=E2=80=AFPM Linus Torvalds
<torvalds@linux-foundation.org> wrote:
>
> On Thu, 25 Apr 2024 at 11:58, Linus Torvalds
> <torvalds@linux-foundation.org> wrote:
> >
> > And maybe this time, it's not a buggy mess?
>
> Actually, even with MASK_VAL() fixed, I think it's *STILL* a buggy mess.
>
> Why? Beuse the *uses* of MASK_VAL() seem entirely bogus.
>
> In particular, we have this in cpc_write():
>
>         if (reg->space_id =3D=3D ACPI_ADR_SPACE_SYSTEM_MEMORY)
>                 val =3D MASK_VAL(reg, val);
>
>         switch (size) {
>         case 8:
>                 writeb_relaxed(val, vaddr);
>                 break;
>         case 16:
>                 writew_relaxed(val, vaddr);
>                 break;
>         ...
>
> and I strongly suspect that it needs to update the 'vaddr' too. Something=
 like
>
>         if (reg->space_id =3D=3D ACPI_ADR_SPACE_SYSTEM_MEMORY) {
>                 val =3D MASK_VAL(reg, val);
>   #ifdef __LITTLE_ENDIAN
>                 vaddr +=3D reg->bit_offset >> 3;
>                 if (reg->bit_offset & 7)
>                         return -EFAULT;
>   #else
>                 /* Fixme if we ever care */
>                 if (reg->bit_offset)
>                         return -EFAULT;
>   #endif
>         }
>
> *might* be changing this in the right direction, but it's unclear and
> I neither know that CPC rules, nor did I think _that_ much about it.

This is a very nice catch, thank you!

> Anyway, the take-away should be that all this code is entirely broken
> and somebody didn't think enough about it.
>
> It's possible that that whole cpc_write() ACPI_ADR_SPACE_SYSTEM_MEMORY
> case should be done as a 64-bit "read-mask-write" sequence.
>
> Possibly with "reg->bit_offset =3D=3D 0" and the 8/16/32/64-bit cases as =
a
> special case for "just do the write".
>
> Or, maybe writes with a non-zero bit offset shouldn't be allowed at
> all, and there are CPC rules that aren't checked. I don't know. I only
> know that the current code is seriously broken.

In any case, this needs to be taken care of (Jared?).

Thanks,
Rafael