Received-SPF: pass (google.com: domain of linux-kernel+bounces-159316-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) client-ip=2604:1380:40f1:3f00::1;
From: Nathan Morrisson <nmorrisson@phytec.com>
To: nm@ti.com,
	vigneshr@ti.com,
	kristo@kernel.org,
	robh@kernel.org,
	krzk+dt@kernel.org,
	conor+dt@kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	upstream@lists.phytec.de,
	w.egorov@phytec.de
Subject: [PATCH] arm64: dts: ti: am62-phyboard-lyra: Add overlay to increase cpu frequency to 1.4 GHz
Date: Thu, 25 Apr 2024 15:19:25 -0700
Message-Id: <20240425221925.1781226-1-nmorrisson@phytec.com>
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
Precedence: bulk
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0:
	=?us-ascii?Q?qKpPyhwNZqPHnndBFn72PavyIpbGBKus3VgX5qYL7nYtU+HtuwsaHLcvmmKJ?=
 =?us-ascii?Q?DjZ5pIwMVKWV2FWGAMTnhkedBM9S197LUr4F9x+4bH9N2h3FTZZUGCEbHrBf?=
 =?us-ascii?Q?MF+jrvBdfYNvndiHD5iMXcBv2888RIf7ISoW5tKPFORP5JpU8P/8OF+39cEk?=
 =?us-ascii?Q?Sx2VC2wdt9v+Il/CHdyTV+xS7zQEQobv46V9A1AJoMwx/ykp03LTRqJecRMm?=
 =?us-ascii?Q?Uw7a46POsC4mJ6COAvPx15QulCcNKJe2WDuMQh7Z8nPLql69qH4zHIGlCfrq?=
 =?us-ascii?Q?TJqJRC6/vg7ikhVJ89xbXWo4FWwSrQASgFWvX4qvNN8VyqPEoMIdQ0WQcqz9?=
 =?us-ascii?Q?yR6fkcyYUUlLjpYdqbscQWwnBSR33JxFwd4/w3XRyqZFeaz7GAFWupcC46zD?=
 =?us-ascii?Q?HHvXXdAfA5vB670rbl3zES/W8gcS+NVeKhOE7hj/NnmRmW7arZ8ZFtwQTRPl?=
 =?us-ascii?Q?7ilVp0Wc7EJknVQwa73L+WV9Qounj2Sj29L+pkRxP34G9e5ThkXb8vYB6eRX?=
 =?us-ascii?Q?PVebMrpGDGWZ+yrD7BiGlHzs3+O4oa8x49nt7omdSL/As3NFDGxqGrq7eUIp?=
 =?us-ascii?Q?WPLT76jkXhCLyE+y9teFYxMd7EcRKO+VdF6qHonluAO0N1mFosOrwUoRZgr+?=
 =?us-ascii?Q?iLCYErhMmjwtDNcf1jCyItG/c7MavoWWh/5Qft53C/CTGPYOntU/XWOMlf3F?=
 =?us-ascii?Q?E0qw7+57FLYYi0VhtVFv7PXgaO2OxmIDv2+B7tEaEQlG2xYFvCJN+ukwmMrW?=
 =?us-ascii?Q?oiboYs9xZ8opDxj+J2omooQyACWYSIinyDpYGJx9cwzqaqWypTyJa3pBr+Kl?=
 =?us-ascii?Q?0yIGGWG7eVzas5oBVHFgllrDYjMmNjeFr2DDqU5sKEoMUR3m8KU9TJ9cPPfJ?=
 =?us-ascii?Q?X2NAEhiEk2CvHwzl6OYQtMN4O+y+xoPovmLa5c1ehvR5T4ZY8/VM5TNLnVwd?=
 =?us-ascii?Q?QKjHa1hy7svZ5cxbNIFGyQeBFwDJXXja6gV7LvmyzjkNEUkmut+5tF99KhSS?=
 =?us-ascii?Q?iF1DxZq5SnNMC75X3F4U3cdMWSVrZQDbTE00O/gYO9Mos8S3VRqoSZY8vaao?=
 =?us-ascii?Q?frqNEnrKJD06bgZ/cxnfVfHDEdshB1zFXR64PBDPZEDE4RQb9343yw9D1DfQ?=
 =?us-ascii?Q?O9fIbI3LDY9GkPtNO3YA0HPsCw2vX5bvWEJoqqNZ+Ho1nGtq9aUiXr5sNIZ6?=
 =?us-ascii?Q?uFhtE2JQdNz1LwV09iEAWLqsKmqo2NXiVDbhYVVPBR1pbDMJflv/kfWT1rSJ?=
 =?us-ascii?Q?rBk0s1KdHrMlP/++L2H6W13DCP4hGFZxzDEkC+ZYJ3iTJxSgSKiWrnphDy2k?=
 =?us-ascii?Q?YISyZwOtrg40pmfVVDHTuqi2/uwyWGWWAmBPgAcOmeDWeqR0YzgAIy5fUm5/?=
 =?us-ascii?Q?Ld9y7yNCufpD3L8sq8tuiU4RV9TNMKAgN+lvMxqbTNIWW9jbJ+pSQc19Fh3o?=
 =?us-ascii?Q?6k12vtO7SA55kRM+Tz2D/9Wty1m270hzT8szn5pKO0JAFjtIZ9eSTsavKcAl?=
 =?us-ascii?Q?L39ImgQqGkZ9Qqw+fLNRndbHj2dT4adNRcZmJnCNKQwoIJ9pSU2uQ3PGeFCl?=
 =?us-ascii?Q?avFkpPNZ0Ajwj7xrQwvjS1xzv8fo1SITT41y5wH0?=
X-OriginatorOrg: phytec.com
X-MS-Exchange-CrossTenant-Network-Message-Id: e1acca03-90a0-4b81-f435-08dc6575cdaa
X-MS-Exchange-CrossTenant-AuthSource: SA1PR22MB5636.namprd22.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Apr 2024 22:19:41.7742
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 67bcab1a-5db0-4ee8-86f4-1533d0b4b5c7
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: fwmDOXEkaRamHn50WCJO/PXNegjdrqBVyuH+q8e6Cm7llf6CN6VeOGHXhyvS2uLm32s0kY65hwl/k+IZwHDWXA==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR22MB5889

The am625 is capable of running at 1.4 GHz when VDD_CORE is increased
from 0.75V to 0.85V. Increasing the voltage while the AM625 is
running has not been validated by TI, so we provide an overlay so that
people may choose to run at 1.4 GHz if they need the additional
performance.

Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
---
 arch/arm64/boot/dts/ti/Makefile               |  3 +++
 .../k3-am625-phyboard-lyra-1-4-ghz-opp.dtso   | 20 +++++++++++++++++++
 2 files changed, 23 insertions(+)
 create mode 100644 arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso

diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 9a722c2473fb..725f7e44f76d 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dev.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-mallow.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-yavia.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-1-4-ghz-opp.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am62x-phyboard-lyra-gpio-fan.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb
 
@@ -106,6 +107,8 @@ k3-am625-beagleplay-csi2-ov5640-dtbs := k3-am625-beagleplay.dtb \
 	k3-am625-beagleplay-csi2-ov5640.dtbo
 k3-am625-beagleplay-csi2-tevi-ov5640-dtbs := k3-am625-beagleplay.dtb \
 	k3-am625-beagleplay-csi2-tevi-ov5640.dtbo
+k3-am625-phyboard-lyra-1-4-ghz-opp.dtbs := k3-am625-phyboard-lyra-rdk.dtb \
+	k3-am625-phyboard-lyra-1-4-ghz-opp.dtbo
 k3-am625-phyboard-lyra-gpio-fan-dtbs := k3-am625-phyboard-lyra-rdk.dtb \
 	k3-am62x-phyboard-lyra-gpio-fan.dtbo
 k3-am625-sk-csi2-imx219-dtbs := k3-am625-sk.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso
new file mode 100644
index 000000000000..6ec6d57ec49c
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (C) 2024 PHYTEC America LLC
+ * Author: Nathan Morrisson <nmorrisson@phytec.com>
+ */
+
+/dts-v1/;
+/plugin/;
+
+&vdd_core {
+	regulator-min-microvolt = <850000>;
+	regulator-max-microvolt = <850000>;
+};
+
+&a53_opp_table {
+	opp-1400000000 {
+		opp-hz = /bits/ 64 <1400000000>;
+		opp-supported-hw = <0x01 0x0004>;
+	};
+};
-- 
2.25.1