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Message-ID: <b2c02eb9-0940-4770-a4b7-22d2af8078db@arm.com>
Date: Fri, 26 Apr 2024 16:07:56 +0100
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Subject: Re: [PATCH V2 0/2] Fix Coresight instruction synthesis logic
To: Arnaldo Carvalho de Melo <acme@kernel.org>,
 Tanmay Jagdale <tanmay@marvell.com>
Cc: john.g.garry@oracle.com, will@kernel.org, mike.leach@linaro.org,
 leo.yan@linux.dev, suzuki.poulose@arm.com, peterz@infradead.org,
 mingo@redhat.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com,
 linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org,
 linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
 sgoutham@marvell.com, gcherian@marvell.com, lcherian@marvell.com
References: <20240404180731.7006-1-tanmay@marvell.com> <Ziqm0QYfGbYjF6xh@x1>
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From: James Clark <james.clark@arm.com>
In-Reply-To: <Ziqm0QYfGbYjF6xh@x1>
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On 25/04/2024 19:54, Arnaldo Carvalho de Melo wrote:
> On Thu, Apr 04, 2024 at 11:37:29PM +0530, Tanmay Jagdale wrote:
>> When we use perf to catpure Coresight trace and generate instruction
>> trace using 'perf script', we get the following output:
>>
>> # perf record -e cs_etm/@tmc_etr0/ -C 9 taskset -c 9 sleep 1
>> # perf script --itrace=i1ns --ns -Fcomm,tid,pid,time,cpu,event,ip,sym,addr,symoff,flags,callindent
> 
> Applies cleanly, can some Coresight people review this and provide a
> Reviewed-by?
> 
> Thanks!
> 

Reviewed-by: James Clark <james.clark@arm.com>