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AJvYcCWPAhVh0wAOlOUGYyx4XRM0GSpKWXibmmP8SduvsnN/52yliMklOiTeHD2DVmMjKa2PBIiyI7qNeU8yHeYMCQUoOPQPMy37KYy2Ym+ExMiSkGLoaR/e/ty8q/bCNZ03vfDi X-Gm-Message-State: AOJu0Yxwnd5q3COGlVDbSGQ644DXGgxGJo3Dq8TNKKtVcojdOcl6xWki G4rzTOWYiHb3CNPhqFrWQY4XLaJKV2lJwUwJlsrYv6kYL0M1lNHoaPJ0AjWx/Dj0h7a3EN7lTTJ 8Vu9QCkN8GDLYl/WhcWOdwzX5FvM= X-Received: by 2002:a17:90a:bb09:b0:2af:3199:ad7a with SMTP id u9-20020a17090abb0900b002af3199ad7amr3129966pjr.6.1714148380325; Fri, 26 Apr 2024 09:19:40 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240426121349.97651-1-puranjay@kernel.org> <20240426121349.97651-2-puranjay@kernel.org> In-Reply-To: <20240426121349.97651-2-puranjay@kernel.org> From: Andrii Nakryiko Date: Fri, 26 Apr 2024 09:19:27 -0700 Message-ID: Subject: Re: [PATCH bpf-next v3 1/2] arm64, bpf: add internal-only MOV instruction to resolve per-CPU addrs To: Puranjay Mohan Cc: Catalin Marinas , Will Deacon , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Eduard Zingerman , Song Liu , Yonghong Song , John Fastabend , KP Singh , Stanislav Fomichev , Hao Luo , Jiri Olsa , Zi Shen Lim , Xu Kuohai , Florent Revest , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org, puranjay12@gmail.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, Apr 26, 2024 at 5:14=E2=80=AFAM Puranjay Mohan wrote: > > From: Puranjay Mohan > > Support an instruction for resolving absolute addresses of per-CPU > data from their per-CPU offsets. This instruction is internal-only and > users are not allowed to use them directly. They will only be used for > internal inlining optimizations for now between BPF verifier and BPF > JITs. > > Since commit 7158627686f0 ("arm64: percpu: implement optimised pcpu > access using tpidr_el1"), the per-cpu offset for the CPU is stored in > the tpidr_el1/2 register of that CPU. > > To support this BPF instruction in the ARM64 JIT, the following ARM64 > instructions are emitted: > > mov dst, src // Move src to dst, if src !=3D dst > mrs tmp, tpidr_el1/2 // Move per-cpu offset of the current cpu in tmp. > add dst, dst, tmp // Add the per cpu offset to the dst. > > To measure the performance improvement provided by this change, the > benchmark in [1] was used: > > Before: > glob-arr-inc : 23.597 =C2=B1 0.012M/s > arr-inc : 23.173 =C2=B1 0.019M/s > hash-inc : 12.186 =C2=B1 0.028M/s > > After: > glob-arr-inc : 23.819 =C2=B1 0.034M/s > arr-inc : 23.285 =C2=B1 0.017M/s I still expected a better improvement (global-arr-inc's results improved more than arr-inc, which is completely different from x86-64), but it's still a good thing to support this for arm64, of course. ack for generic parts I can understand: Acked-by: Andrii Nakryiko > hash-inc : 12.419 =C2=B1 0.011M/s > > [1] https://github.com/anakryiko/linux/commit/8dec900975ef > > Signed-off-by: Puranjay Mohan > --- > arch/arm64/include/asm/insn.h | 7 +++++++ > arch/arm64/lib/insn.c | 11 +++++++++++ > arch/arm64/net/bpf_jit.h | 6 ++++++ > arch/arm64/net/bpf_jit_comp.c | 14 ++++++++++++++ > 4 files changed, 38 insertions(+) > [...]