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AJvYcCVLmSx9zH6E6/dBSps4t1Tfllm6Jv/ncaSpReNxMoysQa069vaYBUFvVoMUA/gvbZ/hlrmteXETXN4UUTarAZVasZLN/u6ShOv1dPkvf/Bm4omJI1+dHGDIZmgt318x7x6i X-Gm-Message-State: AOJu0Yz20udgxBuB2swfzCJqMmj5T0hX/3R8HYlLgGlrvyDIFHwX7dm3 e4K3a4jCRgYWoBbRDTdbtT4Z4KtCg9v3bX9MeRvugqw1YMXX12SOrttLBdd3tO+FN9YWzD1qh1X 9xYa7gw8ZtiHVtnb3H9jVbshv71s= X-Received: by 2002:a17:90b:3692:b0:2af:3088:e36f with SMTP id mj18-20020a17090b369200b002af3088e36fmr3049385pjb.7.1714148814036; Fri, 26 Apr 2024 09:26:54 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240426121349.97651-1-puranjay@kernel.org> <20240426121349.97651-3-puranjay@kernel.org> In-Reply-To: <20240426121349.97651-3-puranjay@kernel.org> From: Andrii Nakryiko Date: Fri, 26 Apr 2024 09:26:42 -0700 Message-ID: Subject: Re: [PATCH bpf-next v3 2/2] bpf, arm64: inline bpf_get_smp_processor_id() helper To: Puranjay Mohan Cc: Catalin Marinas , Will Deacon , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Eduard Zingerman , Song Liu , Yonghong Song , John Fastabend , KP Singh , Stanislav Fomichev , Hao Luo , Jiri Olsa , Zi Shen Lim , Xu Kuohai , Florent Revest , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org, puranjay12@gmail.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, Apr 26, 2024 at 5:14=E2=80=AFAM Puranjay Mohan wrote: > > As ARM64 JIT now implements BPF_MOV64_PERCPU_REG instruction, inline > bpf_get_smp_processor_id(). > > ARM64 uses the per-cpu variable cpu_number to store the cpu id. > > Here is how the BPF and ARM64 JITed assembly changes after this commit: > > BPF > =3D=3D=3D=3D=3D > BEFORE AFTER > -------- ------- > > int cpu =3D bpf_get_smp_processor_id(); int cpu =3D bpf_get_smp= _processor_id(); > (85) call bpf_get_smp_processor_id#229032 (18) r0 =3D 0xffff8000820= 72008 > (bf) r0 =3D &(void __perc= pu *)(r0) > (61) r0 =3D *(u32 *)(r0 += 0) > > ARM64 JIT > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > BEFORE AFTER > -------- ------- > > int cpu =3D bpf_get_smp_processor_id(); int cpu =3D bpf_get_smp= _processor_id(); > mov x10, #0xfffffffffffff4d0 mov x7, #0xffff8000ff= ffffff > movk x10, #0x802b, lsl #16 movk x7, #0x8207, lsl = #16 > movk x10, #0x8000, lsl #32 movk x7, #0x2008 > blr x10 mrs x10, tpidr_el1 > add x7, x0, #0x0 add x7, x7, x10 > ldr w7, [x7] > > Performance improvement using benchmark[1] > > BEFORE AFTER > -------- ------- > > glob-arr-inc : 23.817 =C2=B1 0.019M/s glob-arr-inc : 24.631 = =C2=B1 0.027M/s > arr-inc : 23.253 =C2=B1 0.019M/s arr-inc : 23.742 = =C2=B1 0.023M/s > hash-inc : 12.258 =C2=B1 0.010M/s hash-inc : 12.625 = =C2=B1 0.004M/s > > [1] https://github.com/anakryiko/linux/commit/8dec900975ef > > Signed-off-by: Puranjay Mohan > Acked-by: Andrii Nakryiko > --- > kernel/bpf/verifier.c | 24 +++++++++++++++++------- > 1 file changed, 17 insertions(+), 7 deletions(-) > > diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c > index 4e474ef44e9c..6ff4e63b2ef2 100644 > --- a/kernel/bpf/verifier.c > +++ b/kernel/bpf/verifier.c > @@ -20273,20 +20273,31 @@ static int do_misc_fixups(struct bpf_verifier_e= nv *env) > goto next_insn; > } > > -#ifdef CONFIG_X86_64 > /* Implement bpf_get_smp_processor_id() inline. */ > if (insn->imm =3D=3D BPF_FUNC_get_smp_processor_id && > prog->jit_requested && bpf_jit_supports_percpu_insn()= ) { > /* BPF_FUNC_get_smp_processor_id inlining is an > - * optimization, so if pcpu_hot.cpu_number is eve= r > + * optimization, so if cpu_number_addr is ever > * changed in some incompatible and hard to suppo= rt > * way, it's fine to back out this inlining logic > */ > - insn_buf[0] =3D BPF_MOV32_IMM(BPF_REG_0, (u32)(un= signed long)&pcpu_hot.cpu_number); > - insn_buf[1] =3D BPF_MOV64_PERCPU_REG(BPF_REG_0, B= PF_REG_0); > - insn_buf[2] =3D BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF= _REG_0, 0); > - cnt =3D 3; > + u64 cpu_number_addr; > > +#if defined(CONFIG_X86_64) > + cpu_number_addr =3D (u64)&pcpu_hot.cpu_number; > +#elif defined(CONFIG_ARM64) > + cpu_number_addr =3D (u64)&cpu_number; > +#else > + goto next_insn; > +#endif > + struct bpf_insn ld_cpu_number_addr[2] =3D { > + BPF_LD_IMM64(BPF_REG_0, cpu_number_addr) > + }; here we are violating C89 requirement to have a single block of variable declarations by mixing variables and statements. I'm surprised this is not triggering any build errors on !arm64 && !x86_64. I think we can declare this BPF_LD_IMM64 instruction with zero "addr". And then update ld_cpu_number_addr[0].imm =3D (u32)cpu_number_addr; ld_cpu_number_addr[1].imm =3D (u32)(cpu_number_addr >> 32); WDYT? nit: I'd rename ld_cpu_number_addr to ld_insn or something short like that > + insn_buf[0] =3D ld_cpu_number_addr[0]; > + insn_buf[1] =3D ld_cpu_number_addr[1]; > + insn_buf[2] =3D BPF_MOV64_PERCPU_REG(BPF_REG_0, B= PF_REG_0); > + insn_buf[3] =3D BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF= _REG_0, 0); > + cnt =3D 4; nit: we normally have an empty line here to separate setting up replacement instructions from actual patching > new_prog =3D bpf_patch_insn_data(env, i + delta, = insn_buf, cnt); > if (!new_prog) > return -ENOMEM; > @@ -20296,7 +20307,6 @@ static int do_misc_fixups(struct bpf_verifier_env= *env) > insn =3D new_prog->insnsi + i + delta; > goto next_insn; > } > -#endif > /* Implement bpf_get_func_arg inline. */ > if (prog_type =3D=3D BPF_PROG_TYPE_TRACING && > insn->imm =3D=3D BPF_FUNC_get_func_arg) { > -- > 2.40.1 >