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References: <20240426121349.97651-1-puranjay@kernel.org> <20240426121349.97651-3-puranjay@kernel.org>
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From: Andrii Nakryiko <andrii.nakryiko@gmail.com>
Date: Fri, 26 Apr 2024 10:31:43 -0700
Message-ID: <CAEf4BzYMqG4KFpjUpEoMQfyWBB3vZ-VcHp9n2=_rhZh9YdrVdA@mail.gmail.com>
Subject: Re: [PATCH bpf-next v3 2/2] bpf, arm64: inline bpf_get_smp_processor_id()
 helper
To: Puranjay Mohan <puranjay@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, 
	Alexei Starovoitov <ast@kernel.org>, Daniel Borkmann <daniel@iogearbox.net>, 
	Andrii Nakryiko <andrii@kernel.org>, Martin KaFai Lau <martin.lau@linux.dev>, 
	Eduard Zingerman <eddyz87@gmail.com>, Song Liu <song@kernel.org>, 
	Yonghong Song <yonghong.song@linux.dev>, John Fastabend <john.fastabend@gmail.com>, 
	KP Singh <kpsingh@kernel.org>, Stanislav Fomichev <sdf@google.com>, Hao Luo <haoluo@google.com>, 
	Jiri Olsa <jolsa@kernel.org>, Zi Shen Lim <zlim.lnx@gmail.com>, Xu Kuohai <xukuohai@huawei.com>, 
	Florent Revest <revest@chromium.org>, linux-arm-kernel@lists.infradead.org, 
	linux-kernel@vger.kernel.org, bpf@vger.kernel.org
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On Fri, Apr 26, 2024 at 10:06=E2=80=AFAM Puranjay Mohan <puranjay@kernel.or=
g> wrote:
>
> Andrii Nakryiko <andrii.nakryiko@gmail.com> writes:
>
> > On Fri, Apr 26, 2024 at 5:14=E2=80=AFAM Puranjay Mohan <puranjay@kernel=
org> wrote:
> >>
> >> As ARM64 JIT now implements BPF_MOV64_PERCPU_REG instruction, inline
> >> bpf_get_smp_processor_id().
> >>
> >> ARM64 uses the per-cpu variable cpu_number to store the cpu id.
> >>
> >> Here is how the BPF and ARM64 JITed assembly changes after this commit=
:
> >>
> >>                                          BPF
> >>                                         =3D=3D=3D=3D=3D
> >>               BEFORE                                       AFTER
> >>              --------                                     -------
> >>
> >> int cpu =3D bpf_get_smp_processor_id();           int cpu =3D bpf_get_=
smp_processor_id();
> >> (85) call bpf_get_smp_processor_id#229032       (18) r0 =3D 0xffff8000=
82072008
> >>                                                 (bf) r0 =3D &(void __p=
ercpu *)(r0)
> >>                                                 (61) r0 =3D *(u32 *)(r=
0 +0)
> >>
> >>                                       ARM64 JIT
> >>                                      =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> >>
> >>               BEFORE                                       AFTER
> >>              --------                                     -------
> >>
> >> int cpu =3D bpf_get_smp_processor_id();           int cpu =3D bpf_get_=
smp_processor_id();
> >> mov     x10, #0xfffffffffffff4d0                mov     x7, #0xffff800=
0ffffffff
> >> movk    x10, #0x802b, lsl #16                   movk    x7, #0x8207, l=
sl #16
> >> movk    x10, #0x8000, lsl #32                   movk    x7, #0x2008
> >> blr     x10                                     mrs     x10, tpidr_el1
> >> add     x7, x0, #0x0                            add     x7, x7, x10
> >>                                                 ldr     w7, [x7]
> >>
> >> Performance improvement using benchmark[1]
> >>
> >>              BEFORE                                       AFTER
> >>             --------                                     -------
> >>
> >> glob-arr-inc   :   23.817 =C2=B1 0.019M/s      glob-arr-inc   :   24.6=
31 =C2=B1 0.027M/s
> >> arr-inc        :   23.253 =C2=B1 0.019M/s      arr-inc        :   23.7=
42 =C2=B1 0.023M/s
> >> hash-inc       :   12.258 =C2=B1 0.010M/s      hash-inc       :   12.6=
25 =C2=B1 0.004M/s
> >>
> >> [1] https://github.com/anakryiko/linux/commit/8dec900975ef
> >>
> >> Signed-off-by: Puranjay Mohan <puranjay@kernel.org>
> >> Acked-by: Andrii Nakryiko <andrii@kernel.org>
> >> ---
> >>  kernel/bpf/verifier.c | 24 +++++++++++++++++-------
> >>  1 file changed, 17 insertions(+), 7 deletions(-)
> >>
> >> diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c
> >> index 4e474ef44e9c..6ff4e63b2ef2 100644
> >> --- a/kernel/bpf/verifier.c
> >> +++ b/kernel/bpf/verifier.c
> >> @@ -20273,20 +20273,31 @@ static int do_misc_fixups(struct bpf_verifie=
r_env *env)
> >>                         goto next_insn;
> >>                 }
> >>
> >> -#ifdef CONFIG_X86_64
> >>                 /* Implement bpf_get_smp_processor_id() inline. */
> >>                 if (insn->imm =3D=3D BPF_FUNC_get_smp_processor_id &&
> >>                     prog->jit_requested && bpf_jit_supports_percpu_ins=
n()) {
> >>                         /* BPF_FUNC_get_smp_processor_id inlining is a=
n
> >> -                        * optimization, so if pcpu_hot.cpu_number is =
ever
> >> +                        * optimization, so if cpu_number_addr is ever
> >>                          * changed in some incompatible and hard to su=
pport
> >>                          * way, it's fine to back out this inlining lo=
gic
> >>                          */
> >> -                       insn_buf[0] =3D BPF_MOV32_IMM(BPF_REG_0, (u32)=
(unsigned long)&pcpu_hot.cpu_number);
> >> -                       insn_buf[1] =3D BPF_MOV64_PERCPU_REG(BPF_REG_0=
, BPF_REG_0);
> >> -                       insn_buf[2] =3D BPF_LDX_MEM(BPF_W, BPF_REG_0, =
BPF_REG_0, 0);
> >> -                       cnt =3D 3;
> >> +                       u64 cpu_number_addr;
> >>
> >> +#if defined(CONFIG_X86_64)
> >> +                       cpu_number_addr =3D (u64)&pcpu_hot.cpu_number;
> >> +#elif defined(CONFIG_ARM64)
> >> +                       cpu_number_addr =3D (u64)&cpu_number;
> >> +#else
> >> +                       goto next_insn;
> >> +#endif
> >> +                       struct bpf_insn ld_cpu_number_addr[2] =3D {
> >> +                               BPF_LD_IMM64(BPF_REG_0, cpu_number_add=
r)
> >> +                       };
> >
> > here we are violating C89 requirement to have a single block of
> > variable declarations by mixing variables and statements. I'm
> > surprised this is not triggering any build errors on !arm64 &&
> > !x86_64.
> >
> > I think we can declare this BPF_LD_IMM64 instruction with zero "addr".
> > And then update
> >
> > ld_cpu_number_addr[0].imm =3D (u32)cpu_number_addr;
> > ld_cpu_number_addr[1].imm =3D (u32)(cpu_number_addr >> 32);
> >
> > WDYT?
> >
> > nit: I'd rename ld_cpu_number_addr to ld_insn or something short like t=
hat
>
> I agree with you,
> What do you think about the following diff:

yep, that's what I had in mind, ack

>
> --- 8< ---
>
> -#ifdef CONFIG_X86_64
>                 /* Implement bpf_get_smp_processor_id() inline. */
>                 if (insn->imm =3D=3D BPF_FUNC_get_smp_processor_id &&
>                     prog->jit_requested && bpf_jit_supports_percpu_insn()=
) {
>                         /* BPF_FUNC_get_smp_processor_id inlining is an
> -                        * optimization, so if pcpu_hot.cpu_number is eve=
r
> +                        * optimization, so if cpu_number_addr is ever
>                          * changed in some incompatible and hard to suppo=
rt
>                          * way, it's fine to back out this inlining logic
>                          */
> -                       insn_buf[0] =3D BPF_MOV32_IMM(BPF_REG_0, (u32)(un=
signed long)&pcpu_hot.cpu_number);
> -                       insn_buf[1] =3D BPF_MOV64_PERCPU_REG(BPF_REG_0, B=
PF_REG_0);
> -                       insn_buf[2] =3D BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF=
_REG_0, 0);
> -                       cnt =3D 3;
> +                       u64 cpu_number_addr;
> +                       struct bpf_insn ld_insn[2] =3D {
> +                               BPF_LD_IMM64(BPF_REG_0, 0)
> +                       };
> +
> +#if defined(CONFIG_X86_64)
> +                       cpu_number_addr =3D (u64)&pcpu_hot.cpu_number;
> +#elif defined(CONFIG_ARM64)
> +                       cpu_number_addr =3D (u64)&cpu_number;
> +#else
> +                       goto next_insn;
> +#endif
> +                       ld_insn[0].imm =3D (u32)cpu_number_addr;
> +                       ld_insn[1].imm =3D (u32)(cpu_number_addr >> 32);
> +                       insn_buf[0] =3D ld_insn[0];
> +                       insn_buf[1] =3D ld_insn[1];
> +                       insn_buf[2] =3D BPF_MOV64_PERCPU_REG(BPF_REG_0, B=
PF_REG_0);
> +                       insn_buf[3] =3D BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF=
_REG_0, 0);
> +                       cnt =3D 4;
>
>                         new_prog =3D bpf_patch_insn_data(env, i + delta, =
insn_buf, cnt);
>                         if (!new_prog)
> @@ -20296,7 +20310,6 @@ static int do_misc_fixups(struct bpf_verifier_env=
 *env)
>                         insn      =3D new_prog->insnsi + i + delta;
>                         goto next_insn;
>                 }
> -#endif
>                 /* Implement bpf_get_func_arg inline. */
>
> --- >8---
>
> Thanks,
> Puranjay