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Date: Fri, 26 Apr 2024 16:52:56 -0700
From: Dan Williams <dan.j.williams@intel.com>
To: Ira Weiny <ira.weiny@intel.com>, Dave Jiang <dave.jiang@intel.com>, "Dan
 Williams" <dan.j.williams@intel.com>, Jonathan Cameron
	<jonathan.cameron@huawei.com>, Smita Koralahalli
	<Smita.KoralahalliChannabasappa@amd.com>, Shiju Jose <shiju.jose@huawei.com>
CC: Dan Carpenter <dan.carpenter@linaro.org>, Yazen Ghannam
	<yazen.ghannam@amd.com>, Davidlohr Bueso <dave@stgolabs.net>, "Alison
 Schofield" <alison.schofield@intel.com>, Vishal Verma
	<vishal.l.verma@intel.com>, Ard Biesheuvel <ardb@kernel.org>,
	<linux-efi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-cxl@vger.kernel.org>, Ira Weiny <ira.weiny@intel.com>
Subject: Re: [PATCH v3 2/2] cxl/pci: Process CPER events
Message-ID: <662c3e581f029_b6e029487@dwillia2-mobl3.amr.corp.intel.com.notmuch>
References: <20240426-cxl-cper3-v3-0-6ade7dfc849e@intel.com>
 <20240426-cxl-cper3-v3-2-6ade7dfc849e@intel.com>
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Ira Weiny wrote:
> If the firmware has configured CXL event support to be firmware first
> the OS will receive those events through CPER records.  The CXL layer has
> unique DPA to HPA knowledge and existing event trace parsing in
> place.[0]
> 
> Add a CXL CPER work item and register it with the GHES code to process
> CPER events.
> 
> [0]
> Link: https://lore.kernel.org/all/cover.1711598777.git.alison.schofield@intel.com/

Link: http://lore.kernel.org/r/cover.1711598777.git.alison.schofield@intel.com [0]

Otherwise, looks good,

Reviewed-by: Dan Williams <dan.j.williams@intel.com>