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b=itz3NXWOrWBPtTPsvvfeBRronf0iYbLYVgPwqWZepifYkzurtPOv43E7uTTAi+U9no/hh8Wv+P95ucEfYvOwKHTfe0fzfQEdenA2b125N5XkOWYQq8V/Txub3wYiuJ205Vd5OmuHSjdzjICe6Ri0OBwBYNnjAbhM3gRd2skMMaw= Received: from DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) by DB8PR04MB7018.eurprd04.prod.outlook.com (2603:10a6:10:121::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7519.32; Sun, 28 Apr 2024 12:21:35 +0000 Received: from DU0PR04MB9417.eurprd04.prod.outlook.com ([fe80::d30b:44e7:e78e:662d]) by DU0PR04MB9417.eurprd04.prod.outlook.com ([fe80::d30b:44e7:e78e:662d%4]) with mapi id 15.20.7519.031; Sun, 28 Apr 2024 12:21:35 +0000 From: Peng Fan To: Dan Carpenter , "Peng Fan (OSS)" CC: Sudeep Holla , Cristian Marussi , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Linus Walleij , Aisheng Dong , Jacky Bai , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "imx@lists.linux.dev" , "linux-gpio@vger.kernel.org" Subject: RE: [PATCH v3 6/6] pinctrl: imx: support SCMI pinctrl protocol for i.MX95 Thread-Topic: [PATCH v3 6/6] pinctrl: imx: support SCMI pinctrl protocol for i.MX95 Thread-Index: AQHamSj/KWNiz3mJO0CVZfKqQ8uNkbF9l/eAgAAAZuA= Date: Sun, 28 Apr 2024 12:21:35 +0000 Message-ID: References: <20240428-pinctrl-scmi-oem-v3-v3-0-eda341eb47ed@nxp.com> <20240428-pinctrl-scmi-oem-v3-v3-6-eda341eb47ed@nxp.com> <1bc4d494-f4c0-4bec-a2de-e9971ef4be49@moroto.mountain> In-Reply-To: <1bc4d494-f4c0-4bec-a2de-e9971ef4be49@moroto.mountain> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DU0PR04MB9417.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 68dd09e5-8f03-495d-a738-08dc677dbf58 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Apr 2024 12:21:35.8446 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 9R5CM3MshYwxt2NZJpzs27bxfvQ4J1JRTIpGRfd+zEd0XMQnF73zhuYBK+tRnxe7gUoS9w0lOszc9csy3zOvcw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR04MB7018 Hi Dan, > Subject: Re: [PATCH v3 6/6] pinctrl: imx: support SCMI pinctrl protocol f= or > i.MX95 >=20 > On Sun, Apr 28, 2024 at 01:07:52PM +0800, Peng Fan (OSS) wrote: > > +static int pinctrl_scmi_imx_dt_group_node_to_map(struct pinctrl_dev > *pctldev, > > + struct device_node *np, > > + struct pinctrl_map **map, > > + unsigned int > *reserved_maps, > > + unsigned int *num_maps, > > + const char *func_name) > > +{ > > + struct device *dev =3D pctldev->dev; > > + unsigned long *cfgs =3D NULL; > > + unsigned int n_cfgs, reserve =3D 1; > > + int i, n_pins, ret; > > + u32 ncfg, val, mask, shift, pin_conf, pinmux_group; > > + unsigned long cfg[IMX_SCMI_NUM_CFG]; > > + enum pin_config_param param; > > + struct property *prop; > > + const __be32 *p; > > + > > + n_pins =3D of_property_count_u32_elems(np, "pinmux"); > > + if (n_pins < 0) { > > + dev_warn(dev, "Can't find 'pinmux' property in > node %pOFn\n", np); > > + return -EINVAL; >=20 > return n_pins; Yeah. Fix in v4. >=20 > > + } else if (!n_pins) { > > + return -EINVAL; > > + } > > + > > + ret =3D pinconf_generic_parse_dt_config(np, pctldev, &cfgs, &n_cfgs); > > + if (ret) { > > + dev_err(dev, "%pOF: could not parse node property\n", np); > > + return ret; > > + } > > + > > + pin_conf =3D 0; > > + for (i =3D 0; i < n_cfgs; i++) { > > + param =3D pinconf_to_config_param(cfgs[i]); > > + ret =3D pinctrl_scmi_imx_map_pinconf_type(param, &mask, > &shift); > > + if (ret) { > > + dev_err(dev, "Error map pinconf_type %d\n", ret); > > + return ret; >=20 > This should be goto free_cfgs. Good catch. Fix in v4. >=20 > > + } > > + > > + val =3D pinconf_to_config_argument(cfgs[i]); > > + .. > > + > > +{ > > + unsigned int reserved_maps; > > + struct device_node *np; > > + int ret =3D 0; > > + > > + reserved_maps =3D 0; > > + *map =3D NULL; > > + *num_maps =3D 0; > > + > > + for_each_available_child_of_node(np_config, np) { >=20 > Btw, if you used the scoped version of these loops such as > for_each_available_child_of_node_scoped(), then Yeah, it will simply code. >=20 > > + ret =3D pinctrl_scmi_imx_dt_group_node_to_map(pctldev, np, > map, > > + > &reserved_maps, > > + num_maps, > > + np_config- > >name); > > + if (ret < 0) { > > + of_node_put(np); >=20 > You could get rid of the calls to of_node_put(). I would move the call t= o > pinctrl_utils_free_map() here. ok. Update in v4. >=20 > if (ret) { > pinctrl_utils_free_map(pctldev, *map, *num_maps); > return ret; > } >=20 > > + break; > > + } > > + } > > + > > + if (ret) > > + pinctrl_utils_free_map(pctldev, *map, *num_maps); > > + > > + return ret; >=20 > return 0; Thanks for your quick response, I will wait for more reviews, then post v4. Thanks, Peng. >=20 > > +} >=20 > regards, > dan carpenter