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Wysocki" , Zhang Rui , Jean Delvare , Srinivas Pandruvada , Lukasz Luba , Daniel Lezcano , linux-pm@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, Ricardo Neri Subject: Re: [PATCH v2 3/3] hwmon: (coretemp) Extend the bitmask to read temperature to 0xff Message-ID: <82999e73-145b-44f0-a5a3-d43eed229ca3@roeck-us.net> References: <20240425171311.19519-1-ricardo.neri-calderon@linux.intel.com> <20240425171311.19519-4-ricardo.neri-calderon@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240425171311.19519-4-ricardo.neri-calderon@linux.intel.com> On Thu, Apr 25, 2024 at 10:13:11AM -0700, Ricardo Neri wrote: > The Intel Software Development manual defines the temperature digital > readout as the bits [22:16] of the IA32_[PACKAGE]_THERM_STATUS registers. > Bit 23 is specified as reserved. > > In recent processors, however, the temperature digital readout uses bits > [23:16]. In those processors, using the bitmask 0x7f would lead to > incorrect readings if the temperature deviates from TjMax by more than > 127 degrees Celsius. > > Although not guaranteed, bit 23 is likely to be 0 in processors from a few > generations ago. The temperature reading would still be correct in those > processors when using a 0xff bitmask. > > Model-specific provisions can be made for older processors in which bit 23 > is not 0 should the need arise. > > Signed-off-by: Ricardo Neri Applied. Thanks, Guenter