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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Apr 2024 06:07:08.1604 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 573c6836-eb55-4b2e-1362-08dc68129a01 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF00000148.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5824 Upcoming AMD uarch will support Bus Lock Detect (called Bus Lock Trap in AMD docs). Add support for the same in Linux. Bus Lock Detect is enumerated with cpuid CPUID Fn0000_0007_ECX_x0 bit [24 / BUSLOCKTRAP]. It can be enabled through MSR_IA32_DEBUGCTLMSR. When enabled, hardware clears DR6[11] and raises a #DB exception on occurrence of Bus Lock if CPL > 0. More detail about the feature can be found in AMD APM[1]. Patches are prepared on tip/x86/cpu (e063b531d4e8) Patch #3 depends on SEV-ES LBRV fix: https://lore.kernel.org/r/20240416050338.517-1-ravi.bangoria@amd.com [1]: AMD64 Architecture Programmer's Manual Pub. 40332, Rev. 4.07 - June 2023, Vol 2, 13.1.3.6 Bus Lock Trap https://bugzilla.kernel.org/attachment.cgi?id=304653 Ravi Bangoria (3): x86/split_lock: Move Split and Bus lock code to a dedicated file x86/bus_lock: Add support for AMD KVM SVM: Add Bus Lock Detect support arch/x86/include/asm/cpu.h | 4 + arch/x86/kernel/cpu/Makefile | 1 + arch/x86/kernel/cpu/amd.c | 2 + arch/x86/kernel/cpu/intel.c | 407 --------------------------- arch/x86/kernel/cpu/split-bus-lock.c | 406 ++++++++++++++++++++++++++ arch/x86/kvm/svm/nested.c | 3 +- arch/x86/kvm/svm/svm.c | 16 +- 7 files changed, 430 insertions(+), 409 deletions(-) create mode 100644 arch/x86/kernel/cpu/split-bus-lock.c -- 2.44.0