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a=openpgp-sha256; l=1206; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=jpLPvcnaiJtFOhYzxmrluAjCdASp4Pcd3OYik5xfALw=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmL5X+XjsxS7nH9BzKfJjz86HMhAVFMVC8uDlk7 SM58fyKemaJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZi+V/gAKCRCLPIo+Aiko 1SB+B/wOd9d6CjI9nlVyvH1rzAUnClf5fNFH3j/tXgQP2oXgm7c65FaVp+1TDGs7EveUAQytasg I11HxoRKfQekCDe+m5Ygp2VRz3f74Mnqmcgy33DryMrxMDbOIhUAxmfKpBReLHb3cFHcA/tz/Bi hMGN2RSfi377VFlMNJfqwDVZuSrcAJQ7H7myouJovGJvT/o1xLD0l1i6gxZL3UkEp0AvSwr0s7b yKw6h3gZr2LZMb5ArNsCZyugGvaSjRLPA/BfTrRhBW9S5KzV1PCUW9J2IjfDlRE7+7jkadTez5H ePQtg2OMq1hUZIEZ/qstmEaqjtBxGjBvZNfuIGiELdFpiUd9 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The orientation-switch of the USB+DP QMP PHY is not a property of the board, it is a design property of the QMP PHY itself. Move the property from board DTS to SoC DTSI. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 2 -- arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts index 65ee00db5622..f93de21a26ad 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts @@ -1223,8 +1223,6 @@ &usb_dp_qmpphy { vdda-phy-supply = <&vreg_l3i_1p2>; vdda-pll-supply = <&vreg_l3g_0p91>; - orientation-switch; - status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 4624ea4906d9..9dd66c28c588 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -3751,6 +3751,8 @@ usb_dp_qmpphy: phy@88e8000 { #clock-cells = <1>; #phy-cells = <1>; + orientation-switch; + status = "disabled"; ports { -- 2.39.2