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a=openpgp-sha256; l=1206; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=VaKZ66FGWwoQy5me5qchzFwSeHkkEPWbc66wOo3Oj3o=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmL5X+TKHOdrRtR+dO0bJrcvCX7TBwc/ICKi+CX HGu1rfpj9mJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZi+V/gAKCRCLPIo+Aiko 1bSMB/439o1/JP3m+BS+BjFJBvDpiipkcmNarD+dyeYzpRRHd8PgTSsx4pr5dASI9YTBPxy6bVw yIqDffO8uI9IApPE0DhcRgugSXSZgsbmotwbSaE+288EjyAOl+Yz/+lBuWumMczq4J4HzoPuXoh R9LzzQB9B/rMsC9Zh7Phwd90oJIy2TbV7oG8a77Cqda9uLPXvKCGOBMv2fjSuXF3yiG7vv1iQ1M U9Ull470QADuun0mP6UpWbUNouNRh9BdX/xkOIffsC42GgIFoRQ2FuzT8qqrrdd16NouIEOzjzC 9SH+cssa6lHnpi3v7mSZtrBpwbHig4J3zyd7xMATMxNq0sYB X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The orientation-switch of the USB+DP QMP PHY is not a property of the board, it is a design property of the QMP PHY itself. Move the property from board DTS to SoC DTSI. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 2 -- arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts index 9926294e4f84..71dc06db7736 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -1120,8 +1120,6 @@ &usb_1_qmpphy { vdda-phy-supply = <&vreg_l6b_1p2>; vdda-pll-supply = <&vreg_l1b_0p91>; - - orientation-switch; }; &usb_1_qmpphy_out { diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index d138b90bb280..3494d5076368 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2304,6 +2304,8 @@ usb_1_qmpphy: phy@88e8000 { #clock-cells = <1>; #phy-cells = <1>; + orientation-switch; + status = "disabled"; ports { -- 2.39.2