Received-SPF: pass (google.com: domain of linux-kernel+bounces-162085-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249;
From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>
To: linux-pci@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Rob Herring <robh@kernel.org>,
	=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
	Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Russell King <linux@armlinux.org.uk>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH 01/10] ARM: orion5x: Rename PCI_CONF_{REG,FUNC}() out of the way
Date: Mon, 29 Apr 2024 13:46:24 +0300
Message-Id: <20240429104633.11060-2-ilpo.jarvinen@linux.intel.com>
In-Reply-To: <20240429104633.11060-1-ilpo.jarvinen@linux.intel.com>
References: <20240429104633.11060-1-ilpo.jarvinen@linux.intel.com>
Precedence: bulk
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

orion5x defines PCI_CONF_REG() and PCI_CONF_FUNC() that are problematic
because PCI core is going to introduce defines with the same names.

Add ORION5X prefix to those defines to avoid name conflicts.

Note: as this is part of series that replaces the code in question
anyway, only bare minimum renaming is done and other similarly named
macros are not touched.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 arch/arm/mach-orion5x/pci.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 3313bc5a63ea..77ddab90f448 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -219,8 +219,8 @@ static int __init pcie_setup(struct pci_sys_data *sys)
 /*
  * PCI_CONF_ADDR bits
  */
-#define PCI_CONF_REG(reg)		((reg) & 0xfc)
-#define PCI_CONF_FUNC(func)		(((func) & 0x3) << 8)
+#define ORION5X_PCI_CONF_REG(reg)	((reg) & 0xfc)
+#define ORION5X_PCI_CONF_FUNC(func)	(((func) & 0x3) << 8)
 #define PCI_CONF_DEV(dev)		(((dev) & 0x1f) << 11)
 #define PCI_CONF_BUS(bus)		(((bus) & 0xff) << 16)
 #define PCI_CONF_ADDR_EN		(1 << 31)
@@ -277,8 +277,8 @@ static int orion5x_pci_hw_rd_conf(int bus, int dev, u32 func,
 	spin_lock_irqsave(&orion5x_pci_lock, flags);
 
 	writel(PCI_CONF_BUS(bus) |
-		PCI_CONF_DEV(dev) | PCI_CONF_REG(where) |
-		PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
+		PCI_CONF_DEV(dev) | ORION5X_PCI_CONF_REG(where) |
+		ORION5X_PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
 
 	*val = readl(PCI_CONF_DATA);
 
@@ -301,8 +301,8 @@ static int orion5x_pci_hw_wr_conf(int bus, int dev, u32 func,
 	spin_lock_irqsave(&orion5x_pci_lock, flags);
 
 	writel(PCI_CONF_BUS(bus) |
-		PCI_CONF_DEV(dev) | PCI_CONF_REG(where) |
-		PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
+		PCI_CONF_DEV(dev) | ORION5X_PCI_CONF_REG(where) |
+		ORION5X_PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
 
 	if (size == 4) {
 		__raw_writel(val, PCI_CONF_DATA);
-- 
2.39.2